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Re: __sync_lock_test_and_set on ARM
- From: "Phil Endecott" <spam_from_gcc_help_2 at chezphil dot org>
- To: "Andrew Haley" <aph-gcc at littlepinkcloud dot COM>, <gcc-help at gcc dot gnu dot org>
- Date: Wed, 12 Sep 2007 19:14:01 +0100
- Subject: Re: __sync_lock_test_and_set on ARM
- References: <18152.9913.255951.758383@zebedee.pink>
Andrew Haley wrote:
What OS are you talking about? If you're using Linux, just #include
asm/atomic.h.
OK, if I've followed the #ifs and the #includes correctly then I can
#define __KERNEL__
#include <asm/atomic.h>
and I'll get an atomic_xchg macro that expands to a swp on my hardware
or an ldrex/strex sequence on v6. However, as far as I can see (please
correct me if I'm wrong), on x86 atomic_xchg is not defined. All of
the more complex operations (atomic_add etc) that are defined on x86
are implemented on ARM using kernel-specific 'disable interrupts'
code. And there aren't any macros to indicate which of the atomic
operations are implemented.
Anyway...
If people agree that __sync_lock_test_and_set could be implemented as a
builtin on ARM using SWP, I propose to file a bug suggesting that it is added.
That just leaves the question of whether or not there are macros that
indicate which builtins are defined. It seems that David Daney is
seeing them on his newer compiler. I'll do some more research.
Regards,
Phil.