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Re: Help about mipsel-linux-gcc 4.1.2 asm codes.

From: Ian Lance Taylor <iant at google dot com>
To: "Sync ma" <sync dot jma at gmail dot com>
Cc: gcc-help at gcc dot gnu dot org
Date: 10 Jul 2007 07:15:47 -0700
Subject: Re: Help about mipsel-linux-gcc 4.1.2 asm codes.
References: <dcf6addc0707100057n53d289a5gd258ddee0e903853@mail.gmail.com>

"Sync ma" <sync.jma@gmail.com> writes:

>     I'm confused about asm codes generator by mipsel-linux-gcc,
> .text_rom:9000F788                 lw      $v1, 0x148+arg_4($fp)
> .text_rom:9000F78C                 lw      $v0, 0($v1)
> as I know, mips has a load delay slot, and there should not be any
> instruction use reg '$v1'  before the slot on this situation.

Only MIPS ISA I has a load delay slot.  Processors which implement
later ISAs do not require it.

> Compile options:
> -march=mips32 -mtune=r4600 -mabi=32 -G 0 -ansi -fno-builtin
> -fdelayed-branch -fthread-jumps -fno-pic -mno-abicalls -O0 -g
> -fschedule-insns2 -msoft-float

You are compiling for the MIPS32 ISA, not the MIPS I ISA.  MIPS32 does
not have a load delay slot.  (Yes, changing from ISA names like I to
ISA names like 32 is an incredibly bad idea, but it's not our fault.)

Ian

References:
- Help about mipsel-linux-gcc 4.1.2 asm codes.
  - From: Sync ma

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