Re: asm conflict question

[Richard Bonomo <bonomo at sal dot wisc dot edu>]

On Wed, 9 Aug 2006, Andrew Haley wrote:

<snip>

> MM, wrong.  gcc might put something between the insns.  Ok, try
>
> #define disable() \
>     ({  int __Status; \
>     __asm__ volatile ("clra      ; save CPU status\n" \
>                       "tfr     cc,b\n" \
>                       "orcc    #0x50   ; disable interrupts" \
>                        : "=d" (__Status)); \
>     __Status; })

OK, I get this error message:

error: can't find a register in class `Q_REGS' while reloading `asm'

which I think is generated by the companion "restore" function.

Here are the 3 function definitions as they
currently stand:

#define disable() \
     ({  int __Status; \
     __asm__ volatile ("clra      ; save CPU status\n" \
                       "tfr     cc,b\n" \
                       "orcc    #0x50   ; disable interrupts" \
                        : "=d" (__Status)); \
     __Status; })

#define restore(X) \
    ({ int __Status = (X); \
    __asm__ ("tfr       b,cc    ; restore status" : : "d" (__Status) : 
"d", "cc"); })  [NOTE that the line wrapped in this message]

#define enable() \
    __asm__ ("andcc     #0xaf   ; enable interrupts")


The disable function is as you (Andrew) suggested.
The restore function and enable function definitions
are unchanged.

BTW, I am not familiar with the syntax which was
and it being used.  What does (for example)
("tfr       b,cc    ; restore status" : : "d" (__Status) :"d", "cc")
mean in this context?

Thank you for your help.

Rich

--
************************************************
Richard Bonomo
UW Space Astronomy Laboratory
ph: (608) 263-4683 telefacsimile: (608) 263-0361
SAL-related email: bonomo@sal.wisc.edu
all other email: bonomo@ece.wisc.edu
web page URL: http://www.cae.wisc.edu/~bonomo
************************************************