optimization issues

[Shijun Zhou <s dot zhou at cputech dot com>]

Dear Mr./Ms.,

I am porting GCC as a cross compiler for a MIPS-like target. I am still
using version gcc-2.95.3-5. In order to schedule around the memory latency,
I have defined some define-split. Here is my problem: when I use -O2 or O3
optimization to compile code, the compiler never finishes. It seems that it
stuck somewhere. Can somebody tell me what is happening?

One of my goals in optimization is to schedule as many instructions as
possible in the memory latency slots. However in our typical applications,
there exists lots of name dependency among registers after register
allocation, since only a few registers are used over and over again.
Register renaming is required to do a better scheduling.  However, it seems
that register renaming is a valid option only when using O3, which can be
very slow. My question is: Is it possible to do register renaming without
the speed penalty of O3?

My third question is: Is it possible to implement a custom pass through the
RTL list to perform some custom optimizations? If so, where can I add such a
piece of code? How hard is it to do so? What are the pitfalls?

Thanks!

Shijun Zhou