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r279336 - in /trunk/gcc: ChangeLog config/rs600...
- From: linkw at gcc dot gnu dot org
- To: gcc-cvs at gcc dot gnu dot org
- Date: Fri, 13 Dec 2019 06:01:10 -0000
- Subject: r279336 - in /trunk/gcc: ChangeLog config/rs600...
Author: linkw
Date: Fri Dec 13 06:00:53 2019
New Revision: 279336
URL: https://gcc.gnu.org/viewcvs?rev=279336&root=gcc&view=rev
Log:
[rs6000] Adjust vectorization cost for scalar COND_EXPR
We found that the vectorization cost modeling on scalar COND_EXPR is a bit off
on rs6000. One typical case is 548.exchange2_r, -Ofast -mcpu=power9 -mrecip
-fvect-cost-model=unlimited is better than -Ofast -mcpu=power9 -mrecip (the
default is -fvect-cost-model=dynamic) by 1.94%. Scalar COND_EXPR is expanded
into compare + branch or compare + isel normally, either of them should be
priced more than the simple FXU operation. This patch is to add additional
vectorization cost onto scalar COND_EXPR on top of builtin_vectorization_cost.
The idea to use additional cost value 2 instead of the others: 1) try various
possible value candidates from 1 to 5, 2 is the best measured on Power9. 2)
from latency view, compare takes 3 cycles and isel takes 2 on Power9, it's
2.5 times of simple FXU instruction which takes cost 1 in the current
modeling, it's close. 3) get fine SPEC2017 ratio on Power8 as well.
gcc/ChangeLog
* config/rs6000/rs6000.c (adjust_vectorization_cost): New function.
(rs6000_add_stmt_cost): Call adjust_vectorization_cost and update
stmt_cost.
Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/rs6000/rs6000.c