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r249607 - in /trunk/gcc: ChangeLog config/rs600...
- From: meissner at gcc dot gnu dot org
- To: gcc-cvs at gcc dot gnu dot org
- Date: Fri, 23 Jun 2017 18:25:10 -0000
- Subject: r249607 - in /trunk/gcc: ChangeLog config/rs600...
Author: meissner
Date: Fri Jun 23 18:25:10 2017
New Revision: 249607
URL: https://gcc.gnu.org/viewcvs?rev=249607&root=gcc&view=rev
Log:
[gcc]
2017-06-23 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/80510
* config/rs6000/rs6000.md (ALTIVEC_DFORM): Do not allow DImode in
32-bit, since indexed is not valid for DImode.
(mov<mode>_hardfloat32): Reorder ISA 2.07 load/stores before ISA
3.0 d-form load/stores to be the same as mov<mode>_hardfloat64.
(define_peephole2 for Altivec d-form load): Add 32-bit support.
(define_peephole2 for Altivec d-form store): Likewise.
[gcc/testsuite]
2017-06-23 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/80510
* gcc.target/powerpc/pr80510-1.c: Allow test to run on 32-bit.
* gcc.target/powerpc/pr80510-2.c: Likewise.
Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/rs6000/rs6000.md
trunk/gcc/testsuite/ChangeLog
trunk/gcc/testsuite/gcc.target/powerpc/pr80510-1.c
trunk/gcc/testsuite/gcc.target/powerpc/pr80510-2.c