This is the mail archive of the mailing list for the GCC project.

Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

r242292 - in /branches/ARM/sve-branch/gcc: conf...

Author: rsandifo
Date: Fri Nov 11 17:34:59 2016
New Revision: 242292

[AArch64] Rework interface to add constant/offset routines

This patch changes aarch64_add_constant_internal so that it
takes separate source and destination registers, rather than
simply handling the case in which the two are the same.  It also
changes the temporary register from a register number to an rtx,
which is useful later for aarch64_internal_mov_immediate.
The temporary register may be null if no temporary is available.

The patch also makes aarch64_add_offset a simple wrapper
around aarch64_add_constant_internal.  The SVE patch will
put the handling of VL-based constants here.

The vcall_offset == 0 path in aarch64_output_mi_thunk
will use temp0 as well as temp1 once SVE is added.

A side-effect of the patch is that we now generate moves
instead of adds of zero in the pr70044.c test.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]