gcc/gcc ChangeLog.csl-arm config/arm/aof.h con ...

[pbrook at gcc dot gnu dot org]

CVSROOT:	/cvs/gcc
Module name:	gcc
Branch: 	csl-arm-branch
Changes by:	pbrook@gcc.gnu.org	2005-08-12 15:31:10

Modified files:
	gcc            : ChangeLog.csl-arm 
	gcc/config/arm : aof.h aout.h arm-cores.def arm-protos.h 
	                 arm-tune.md arm.c arm.h arm.md cirrus.md fpa.md 
	                 iwmmxt.md lib1funcs.asm t-arm vfp.md 
	gcc/doc        : invoke.texi 
Added files:
	gcc/config/arm : thumb2.md 

Log message:
	2005-08-12  Paul Brook  <paul@codesourcery.com>
	
	Thumb-2 support.
	* config/arm/aof.h (ASM_OUTPUT_ADDR_DIFF_ELT,
	ASM_OUTPUT_ADDR_VEC_ELT): Set Thumb bit on Thumb-2 addresses.
	* config/arm/out.h (ASM_OUTPUT_ADDR_DIFF_ELT,
	ASM_OUTPUT_ADDR_VEC_ELT): Ditto.
	* config/arm/arm-cores.def: Add arm1156t2-s.
	* config/arm/arm-protos.h: Update function prototypes.
	* config/arm/arm-tune.md: Regenerate.
	* config/arm/arm.c (TARGET_ASM_FILE_START, FL_THUMB2,
	FL_FOR_ARCH6T2): Define.
	(arm_arch_thumb2, arm_condexec_count, arm_condexec_mask,
	arm_condexec_masklen): New variables.
	(ARM_LSL_NAME): Define.
	(all_architectures): Add 6T2.
	(arm_override_options): Set arm_arch_thumb2. Allow use of
	coprocessors in Thumb-2.
	(use_return_insn): Only use StrongARM workaround in Arm mode.
	(const_ok_for_arm): Handle Thumb-2 constants.
	(arm_gen_constant): Ditto.
	(legitimize_pic_address): Add Thumb-2.
	(arm_load_pic_register): Generate Thumb-2 sequence.
	(thumb2_legitimate_address_p): New function.
	(thumb2_index_mul_operand): New function.
	(thumb2_legitimate_index_p): New function.
	(thumb_base_register_rtx_p, thumb_index_register_rtx_p,
	thumb_legitimate_address_p, thumb_rtx_costs,
	thumb_compute_save_reg_mask, thumb_final_prescan_insn,
	thumb_expand_prologue, thumb_expand_epilogue,
	thumb_output_function_prologue, thumb_cmp_operand,
	thumb_cmpneg_operand): Rename ...
	(thumb1_base_register_rtx_p, thumb1_index_register_rtx_p,
	thumb1_legitimate_address_p, thumb1_rtx_costs,
	thumb1_compute_save_reg_mask, thumb1_final_prescan_insn,
	thumb1_expand_prologue, thumb1_expand_epilogue,
	thumb1_output_function_prologue, thumb1_cmp_operand,
	thumb1_cmpneg_operand): ... to this.  Update callers.
	(arm_address_cost): Use arm routine for Thumb-2.
	(low_register_operand): New function.
	(arm_add_operand): Treat Thumb-2 like Arm.
	(thumb_16bit_operator): New function.
	(load_multiple_sequence): Only allow ldmib and ldmda in Arm mode.
	(emit_ldm_seq): Output unified assembly.
	(emit_stm_seq): Ditto.
	(arm_select_cc_mode): Treat Thumb-2 like Arm.
	(print_multi_reg): Don't print comma.
	(output_mov_long_double_fpa_from_arm): Output unified assebly.
	(output_mov_double_arm_from_fpa): Ditto.
	(output_move_double): Ditto.  Disallow Arm specific addressing modes
	in Thumb-2 mode.
	(arm_shift_nmem): New function.
	(arithmetic_instr, shift_op): Use it.  Use ARM_LSL_NAME.
	(arm_compute_save_reg0_reg12_mask): Handle Thumb-2 frames.
	(arm_compute_save_reg_mask): Don't create apcs frame for thumb2.
	(output_return_instruction): Only use StrongARM workaround in Arm mode.
	(arm_output_function_prologue): Threat Thumb-2 like Arm.
	(arm_output_epilogue): Implement Thumb-2.
	(arm_output_function_epilogue): Treat Thumb-2 like Arm.
	(arm_get_frame_offsets): Ditto.
	(arm_save_coproc_regs): New function.
	(arm_expand_prologue): Use it.  Handle Thumb-2.
	(arm_print_condition): New function.
	(arm_print_operand): Use it.  Implement '(', ')', '.', '!' and 'L'.
	(thumb2_final_prescan_insn): New function.
	(thumb2_asm_output_opcode): New function.
	(arm_hard_regno_mode_ok): Treat Thumb-2 like Arm.
	(arm_regno_class): Implement thumb2 classes.
	(arm_file_start): New function.
	(arm_output_mi_thunk): Treat Thumb-2 like Arm.
	(thumb_set_return_address): Implement Thumb-2.
	(arm_output_shift): New function.
	* config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Add __thumb2__.
	(TARGET_THUMB1, TARGET_THUMB2, TARGET_32BIT, TARGET_UNIFIED_ASM):
	Define.
	(arm_arch_thumb2): Declare;
	(CONDITIONAL_REGISTER_USAGE): Enable coprocessor registers on Thumb-2.
	(STATIC_CHAIN_REGNUM, HARD_REGNO_NREGS, MODE_BASE_REG_CLASS,
	SMALL_REGISTER_CLASSES, CONST_DOUBLE_OK_FOR_LETTER_P,
	EXTRA_CONSTRAINT_STR, SECONDARY_OUTPUT_RELOAD_CLASS,
	SECONDARY_INPUT_RELOAD_CLASS, REGISTER_MOVE_COST, LIBCALL_VALUE,
	FUNCTION_VALUE_REGNO_P, REGNO_MODE_OK_FOR_BASE_P,
	LEGITIMATE_CONSTANT_P, REG_MODE_OK_FOR_BASE_P, REG_OK_FOR_INDEX_P,
	GO_IF_MODE_DEPENDENT_ADDRESS, MEMORY_MOVE_COST, BRANCH_COST,
	PRINT_OPERAND_ADDRESS): Treat Thumb-2 like Arm.
	(CONST_OK_FOR_THUMB2_LETTER): Define.
	(CONST_OK_FOR_THUMB_LETTER, THUMB_TRAMPOLINE_TEMPLATE,
	THUMB_REGNO_MODE_OK_FOR_BASE_P, THUMB_REG_MODE_OK_FOR_BASE_P,
	THUMB_REG_MODE_OK_FOR_BASE_P, THUMB_REG_OK_FOR_INDEX_P,
	THUMB_GO_IF_LEGITIMATE_ADDRESS): Rename ...
	(CONST_OK_FOR_THUMB1_LETTER, THUMB_TRAMPOLINE_TEMPLATE,
	THUMB1_REGNO_MODE_OK_FOR_BASE_P, THUMB1_REG_MODE_OK_FOR_BASE_P,
	THUMB1_REG_MODE_OK_FOR_BASE_P, THUMB1_REG_OK_FOR_INDEX_P,
	THUMB1_GO_IF_LEGITIMATE_ADDRESS): ... to this.
	(CONST_OK_FOR_LETTER_P, TRAMPOLINE_TEMPLATE, TRAMPOLINE_SIZE,
	INITIALIZE_TRAMPOLINE, GO_IF_LEGITIMATE_ADDRESS, LEGITIMIZE_ADDRESS,
	ASM_APP_OFF, ARM_DECLARE_FUNCTION_NAME): Handle Thumb-2.
	(THUMB2_TRAMPOLINE_TEMPLATE): Define.
	(TRAMPOLINE_ADJUST_ADDRESS, ASM_OUTPUT_OPCODE,
	THUMB2_GO_IF_LEGITIMATE_ADDRESS, THUMB2_LEGITIMIZE_ADDRESS,
	ADJUST_INSN_LENGTH): Define.
	(PRINT_OPERAND_PUNCT_VALID_P): Add '(', ')', '.' and '!'.
	(PREDICATE_CODES): Add low_register_operand and thumb_16bit_operator.
	* config/arm/arm.md: Rename thumb_* thumb1_*.  Make 16-bit thumb
	patterns conditional on TARGET_THUMB1. Replace '%?' with
	'%(', '%)' and '%.' as appropriate for unified assembly syntax.
	Enable many Arm patterns/expanders for Thumb-2.
	Add new "ce_count" attribute.
	Include thumb2.md
	(incscc, decscc, smaxsi3, sminsi3, umaxsi3, sminsi3, zero_extendsidi2,
	zero_extendqidi2, extendsidi2): Divide into
	define_expand and define_insn.
	(ne_zeroextractsi, minmax_arithsi): Insert IT instructions for Thumb-2.
	(arm_shiftsi3, shiftsi3_compare0, shiftsi3_compare0_scratch): Use
	arm_output_shift.
	(movhi, indirect_jump): Handle thumb2.
	(push_multi): Use push and pop for thumb2.
	(nop): Output "nop" in unified assembly.
	* config/arm/lib1funcs.asm: Add __ARM_ARCH_6T2__.
	* config/arm/t-arm (MD_INCLUDES): Add thumb2.md
	* config/arm/thumb2.md: New file.
	* doc/invoke.texi: Document that -mthumb may enable Thumb-2.

Patches:
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/ChangeLog.csl-arm.diff?cvsroot=gcc&only_with_tag=csl-arm-branch&r1=1.1.2.122&r2=1.1.2.123
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/config/arm/thumb2.md.diff?cvsroot=gcc&only_with_tag=csl-arm-branch&r1=NONE&r2=1.1.2.1
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/config/arm/aof.h.diff?cvsroot=gcc&only_with_tag=csl-arm-branch&r1=1.28.8.3&r2=1.28.8.4
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/config/arm/aout.h.diff?cvsroot=gcc&only_with_tag=csl-arm-branch&r1=1.35.8.1&r2=1.35.8.2
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/config/arm/arm-cores.def.diff?cvsroot=gcc&only_with_tag=csl-arm-branch&r1=1.1.2.8&r2=1.1.2.9
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/config/arm/arm-protos.h.diff?cvsroot=gcc&only_with_tag=csl-arm-branch&r1=1.60.4.22&r2=1.60.4.23
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/config/arm/arm-tune.md.diff?cvsroot=gcc&only_with_tag=csl-arm-branch&r1=1.2.2.4&r2=1.2.2.5
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/config/arm/arm.c.diff?cvsroot=gcc&only_with_tag=csl-arm-branch&r1=1.303.2.87&r2=1.303.2.88
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/config/arm/arm.h.diff?cvsroot=gcc&only_with_tag=csl-arm-branch&r1=1.210.2.63&r2=1.210.2.64
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/config/arm/arm.md.diff?cvsroot=gcc&only_with_tag=csl-arm-branch&r1=1.145.2.34&r2=1.145.2.35
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/config/arm/cirrus.md.diff?cvsroot=gcc&only_with_tag=csl-arm-branch&r1=1.5.12.3&r2=1.5.12.4
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/config/arm/fpa.md.diff?cvsroot=gcc&only_with_tag=csl-arm-branch&r1=1.2.14.3&r2=1.2.14.4
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/config/arm/iwmmxt.md.diff?cvsroot=gcc&only_with_tag=csl-arm-branch&r1=1.3.4.4&r2=1.3.4.5
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/config/arm/lib1funcs.asm.diff?cvsroot=gcc&only_with_tag=csl-arm-branch&r1=1.26.4.15&r2=1.26.4.16
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/config/arm/t-arm.diff?cvsroot=gcc&only_with_tag=csl-arm-branch&r1=1.1.2.1&r2=1.1.2.2
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/config/arm/vfp.md.diff?cvsroot=gcc&only_with_tag=csl-arm-branch&r1=1.1.2.4&r2=1.1.2.5
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/doc/invoke.texi.diff?cvsroot=gcc&only_with_tag=csl-arm-branch&r1=1.356.2.18&r2=1.356.2.19