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[Bug c/81709] New: __attribute__((interrupt)) should handle SSE registers
- From: "anatol.pomozov at gmail dot com" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Fri, 04 Aug 2017 04:47:12 +0000
- Subject: [Bug c/81709] New: __attribute__((interrupt)) should handle SSE registers
- Auto-submitted: auto-generated
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81709
Bug ID: 81709
Summary: __attribute__((interrupt)) should handle SSE registers
Product: gcc
Version: 7.1.1
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: c
Assignee: unassigned at gcc dot gnu.org
Reporter: anatol.pomozov at gmail dot com
Target Milestone: ---
GCC documentation for __attribute__((interrupt)) states that interrupts should
not use SSE/MPX/ MMX/x87 as GCC does not preserve the register content in
handlers. https://gcc.gnu.org/onlinedocs/gcc/x86-Function-Attributes.html
Is there any way to relax this restriction and make GCC aware of SSE/.. usage
and preserve the state correctly? While I think that interrupt handlers should
be as fast as possible there are cases when it is OK to call functions compiled
with SSE support. GCC should handle such situations and preserve SSE/..
registers.
Clang handles this situation. Here is a compiler output for a handler with a
function call that uses SSE:
__attribute__((interrupt)) void handle_breakpoint(struct interrupt_frame
*frame) {
printf("Hello from breakpoint handler\n");
}
GCC 7:
00000000001021b0 <handle_breakpoint>:
1021b0: 41 53 push %r11
1021b2: 41 52 push %r10
1021b4: 41 51 push %r9
1021b6: 41 50 push %r8
1021b8: 57 push %rdi
1021b9: 56 push %rsi
1021ba: bf 40 33 10 00 mov $0x103340,%edi
1021bf: 51 push %rcx
1021c0: 52 push %rdx
1021c1: 50 push %rax
1021c2: 31 c0 xor %eax,%eax
1021c4: fc cld
1021c5: e8 c6 de ff ff callq 100090 <printf>
1021ca: 58 pop %rax
1021cb: 5a pop %rdx
1021cc: 59 pop %rcx
1021cd: 5e pop %rsi
1021ce: 5f pop %rdi
1021cf: 41 58 pop %r8
1021d1: 41 59 pop %r9
1021d3: 41 5a pop %r10
1021d5: 41 5b pop %r11
1021d7: 48 cf iretq
1021d9: 0f 1f 80 00 00 00 00 nopl 0x0(%rax)
Clang 4:
0000000000100260 <handle_breakpoint>:
100260: 50 push %rax
100261: 41 53 push %r11
100263: 41 52 push %r10
100265: 41 51 push %r9
100267: 41 50 push %r8
100269: 57 push %rdi
10026a: 56 push %rsi
10026b: 52 push %rdx
10026c: 51 push %rcx
10026d: 48 81 ec 00 01 00 00 sub $0x100,%rsp
100274: 44 0f 29 bc 24 f0 00 movaps %xmm15,0xf0(%rsp)
10027b: 00 00
10027d: 44 0f 29 b4 24 e0 00 movaps %xmm14,0xe0(%rsp)
100284: 00 00
100286: 44 0f 29 ac 24 d0 00 movaps %xmm13,0xd0(%rsp)
10028d: 00 00
10028f: 44 0f 29 a4 24 c0 00 movaps %xmm12,0xc0(%rsp)
100296: 00 00
100298: 44 0f 29 9c 24 b0 00 movaps %xmm11,0xb0(%rsp)
10029f: 00 00
1002a1: 44 0f 29 94 24 a0 00 movaps %xmm10,0xa0(%rsp)
1002a8: 00 00
1002aa: 44 0f 29 8c 24 90 00 movaps %xmm9,0x90(%rsp)
1002b1: 00 00
1002b3: 44 0f 29 84 24 80 00 movaps %xmm8,0x80(%rsp)
1002ba: 00 00
1002bc: 0f 29 7c 24 70 movaps %xmm7,0x70(%rsp)
1002c1: 0f 29 74 24 60 movaps %xmm6,0x60(%rsp)
1002c6: 0f 29 6c 24 50 movaps %xmm5,0x50(%rsp)
1002cb: 0f 29 64 24 40 movaps %xmm4,0x40(%rsp)
1002d0: 0f 29 5c 24 30 movaps %xmm3,0x30(%rsp)
1002d5: 0f 29 54 24 20 movaps %xmm2,0x20(%rsp)
1002da: 0f 29 4c 24 10 movaps %xmm1,0x10(%rsp)
1002df: 0f 29 04 24 movaps %xmm0,(%rsp)
1002e3: fc cld
1002e4: bf 4f 3c 10 00 mov $0x103c4f,%edi
1002e9: 31 c0 xor %eax,%eax
1002eb: e8 f0 28 00 00 callq 102be0 <printf>
1002f0: 0f 28 04 24 movaps (%rsp),%xmm0
1002f4: 0f 28 4c 24 10 movaps 0x10(%rsp),%xmm1
1002f9: 0f 28 54 24 20 movaps 0x20(%rsp),%xmm2
1002fe: 0f 28 5c 24 30 movaps 0x30(%rsp),%xmm3
100303: 0f 28 64 24 40 movaps 0x40(%rsp),%xmm4
100308: 0f 28 6c 24 50 movaps 0x50(%rsp),%xmm5
10030d: 0f 28 74 24 60 movaps 0x60(%rsp),%xmm6
100312: 0f 28 7c 24 70 movaps 0x70(%rsp),%xmm7
100317: 44 0f 28 84 24 80 00 movaps 0x80(%rsp),%xmm8
10031e: 00 00
100320: 44 0f 28 8c 24 90 00 movaps 0x90(%rsp),%xmm9
100327: 00 00
100329: 44 0f 28 94 24 a0 00 movaps 0xa0(%rsp),%xmm10
100330: 00 00
100332: 44 0f 28 9c 24 b0 00 movaps 0xb0(%rsp),%xmm11
100339: 00 00
10033b: 44 0f 28 a4 24 c0 00 movaps 0xc0(%rsp),%xmm12
100342: 00 00
100344: 44 0f 28 ac 24 d0 00 movaps 0xd0(%rsp),%xmm13
10034b: 00 00
10034d: 44 0f 28 b4 24 e0 00 movaps 0xe0(%rsp),%xmm14
100354: 00 00
100356: 44 0f 28 bc 24 f0 00 movaps 0xf0(%rsp),%xmm15
10035d: 00 00
10035f: 48 81 c4 00 01 00 00 add $0x100,%rsp
100366: 59 pop %rcx
100367: 5a pop %rdx
100368: 5e pop %rsi
100369: 5f pop %rdi
10036a: 41 58 pop %r8
10036c: 41 59 pop %r9
10036e: 41 5a pop %r10
100370: 41 5b pop %r11
100372: 58 pop %rax
100373: 48 cf iretq
100375: 66 66 2e 0f 1f 84 00 data16 nopw %cs:0x0(%rax,%rax,1)
10037c: 00 00 00 00