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[Bug rtl-optimization/81611] [8 Regression] gcc un-learned loop / post-increment optimization
- From: "rguenth at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Mon, 31 Jul 2017 07:20:56 +0000
- Subject: [Bug rtl-optimization/81611] [8 Regression] gcc un-learned loop / post-increment optimization
- Auto-submitted: auto-generated
- References: <bug-81611-4@http.gcc.gnu.org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81611
Richard Biener <rguenth at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Known to work| |4.7.3
Target Milestone|--- |8.0
Summary|gcc un-learned loop / |[8 Regression] gcc
|post-increment optimization |un-learned loop /
| |post-increment optimization
Known to fail| |8.0
--- Comment #1 from Richard Biener <rguenth at gcc dot gnu.org> ---
Looks like a register allocation / SSA coalescing issue to me. The IV is
either not coalesced on the backedge or RA splits the live range. Maybe IVOPTs
related as well.
I suspect unless you do some more digging (bisection?) nothing will happen here
;)