[Bug middle-end/72795] New: Missed optimization of external-linkage variables in presence of barriers

["ahmad at a3f dot at" <gcc-bugzilla at gcc dot gnu dot org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=72795

            Bug ID: 72795
           Summary: Missed optimization of external-linkage variables in
                    presence of barriers
           Product: gcc
           Version: 6.1.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: middle-end
          Assignee: unassigned at gcc dot gnu.org
          Reporter: ahmad at a3f dot at
  Target Milestone: ---

Godbolt link: https://godbolt.org/g/egb73f

         int x;
  static int y;

  int f() {     x = 1; asm volatile("":::"memory"); x = 2; return x; }
  int g() {     y = 1; asm volatile("":::"memory"); y = 2; return y; }
  int h() { int z = 1; asm volatile("":::"memory"); z = 2; return z; }

on GCC 6.1 with -O2 for AMD64 generates following assembly:

  f():
        movl    $1, x(%rip)
        movl    $2, x(%rip)
        movl    $2, %eax
        ret
  g():
        movl    $2, %eax
        ret
  h():
        movl    $2, %eax
        ret

The question is: Was optimizing the non-volatile write in g() and h() the
intended behavior?
And if so, shouldn't same optimization be applied when the variable is of
external linkage (f)?

Replacing the compiler barrier with a full memory barrier gives same behavior.


I also tried same with clang and icc. Clang does as GCC does, icc doesn't
optimize g(), but optimizes h().