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[Bug rtl-optimization/66706] New: Redundant shift instruction on x >> (n & 32)
- From: "msebor at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Tue, 30 Jun 2015 15:49:15 +0000
- Subject: [Bug rtl-optimization/66706] New: Redundant shift instruction on x >> (n & 32)
- Auto-submitted: auto-generated
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66706
Bug ID: 66706
Summary: Redundant shift instruction on x >> (n & 32)
Product: gcc
Version: 5.1.0
Status: UNCONFIRMED
Keywords: missed-optimization
Severity: enhancement
Priority: P3
Component: rtl-optimization
Assignee: unassigned at gcc dot gnu.org
Reporter: msebor at gcc dot gnu.org
CC: mpolacek at gcc dot gnu.org, msebor at gcc dot gnu.org,
rv at rasmusvillemoes dot dk, segher at gcc dot gnu.org,
unassigned at gcc dot gnu.org
Depends on: 66552
Target Milestone: ---
Target: x86, powerpc64
+++ This bug was initially created as a clone of Bug #66552 +++
Compiling the following function with -O2:
unsigned f(unsigned x, int n)
{
return x >> (n & 32);
}
results in an unnecessary instruction to zero out the already clear high order
bits of register 3 after the shift instruction:
rldicl 4,4,0,59
srw 3,3,4
rldicl 3,3,0,32
blr
Clang emits an optimal sequence:
rlwinm 4, 4, 0, 27, 31
srw 3, 3, 4
blr
Referenced Bugs:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66552
[Bug 66552] Missed optimization when shift amount is result of signed modulus