[Bug target/64600] [5.0 regression] arm-rtems ICE on valid code (-mcpu=xscale)

["ktkachov at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64600

--- Comment #11 from ktkachov at gcc dot gnu.org ---
(In reply to rsandifo@gcc.gnu.org from comment #10)
> (In reply to ktkachov from comment #8)
> > The ICE is in the wide-int bit_and code when trying to process the rtx:
> > 
> > (and:SI
> >   (const_int 4294963215 [0xfffff00f])
> >   (const_int 4111 [0x100f])
> > )
> > 
> > In particular it seems to have problems constructing a wide-int for
> > (const_int 4294963215 [0xfffff00f])
> 
> Yeah, that isn't a valid SImode const_int.  It needs to be sign-extended
> rather than zero-extended from bit 31.

Thanks, I think I've tracked down the source of it in expand.
In particular arm_gen_constant during constant splitting from the andsi3
pattern.
Some bit twiddling goes wrong. I'll have a closer look