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[Bug target/64516] arm: wrong unaligned load generated
- From: "ramana at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Fri, 16 Jan 2015 14:24:12 +0000
- Subject: [Bug target/64516] arm: wrong unaligned load generated
- Auto-submitted: auto-generated
- References: <bug-64516-4 at http dot gcc dot gnu dot org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64516
Ramana Radhakrishnan <ramana at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|UNCONFIRMED |NEW
Last reconfirmed| |2015-01-16
CC| |ramana at gcc dot gnu.org
Ever confirmed|0 |1
Known to fail| |4.9.0, 4.9.1, 4.9.2, 5.0
--- Comment #1 from Ramana Radhakrishnan <ramana at gcc dot gnu.org> ---
Hmmm, I'm not sure if such type punning pushes the attributes through. We seem
to think that the alignment will be 16 bits and not 8 bits at expand time.
(insn 6 3 7 2 (set (reg:SI 115)
(zero_extend:SI (mem:HI (reg/v/f:SI 112 [ p ]) [1 MEM[(const struct TU2
*)p_2(D)]+0 S2 A16]))) /tmp/al.c:17 -1
(nil))