This is the mail archive of the gcc-bugs@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

[Bug target/54602] [SH] Register pop insn not put in rts delay slot


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=54602

--- Comment #4 from Kazumoto Kojima <kkojima at gcc dot gnu.org> 2012-10-10 22:44:17 UTC ---
(In reply to comment #3)
> Kaz, could you please also have a pre-look at this?  I might be missing
> something...

Looks reasonable to me, though I also might be missing something.

> Also, I've noticed that on SH4 (which has banked regs R0..R7) the banked regs
> are also saved / restored in an interrupt function.  This actually defeats the
> purpose of the R0..R7 register bank.  Maybe some historic reason, or just
> accident?

I don't know the history about it.  I can only imagine that some
system could assume some banked regs will be not clobbered with
their exception handler and will be used like as normal registers.
A new -m option which controls the behavior of which default
is not to save/restore the banked regs?


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]