[Bug rtl-optimization/53942] [4.6/4.7/4.8 Regression] unable to find a register to spill in class 'CREG'

["ubizjak at gmail dot com" <gcc-bugzilla at gcc dot gnu dot org>]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53942

Uros Bizjak <ubizjak at gmail dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Keywords|ra                          |
          Component|target                      |rtl-optimization
   Target Milestone|---                         |4.6.4

--- Comment #2 from Uros Bizjak <ubizjak at gmail dot com> 2012-07-13 14:36:42 UTC ---
Please note that "static" function declaration enables register parameter
passing, so we have live AX, DX and CX at function entry.

combine pass propagates hard register to (insn 17):

(insn 17 16 18 2 (parallel [
            (set (reg:QI 90 [ D.1417 ])
                (and:QI (reg:QI 2 cx [ ISRA.5 ])
                    (subreg:QI (reg:SI 88 [ D.1419 ]) 0)))
            (clobber (reg:CC 17 flags))
        ]) pr53942.c:22 382 {*andqi_1}
     (expr_list:REG_DEAD (reg:HI 2 cx [ ISRA.5 ])
        (expr_list:REG_UNUSED (reg:CC 17 flags)
            (expr_list:REG_DEAD (reg:SI 88 [ D.1419 ])
                (nil)))))

and this effectively blocks CX usage in between (insn 17) and function entry.
RA actually can't undo this propagation and fails to allocate CX when this is
the only alternative.

Reconfirmed as RTL optimization issue. Combine should not propagate hard
registers on its own.