[Bug target/53447] missed optimization of 64bit ALU operation with small constant

["steven at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53447

Steven Bosscher <steven at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |steven at gcc dot gnu.org

--- Comment #1 from Steven Bosscher <steven at gcc dot gnu.org> 2012-05-22 08:24:52 UTC ---
Confirmed. 

Here is the assembler output with the "-dAp -fdump-rtl-all-details" options:

t0p:
    @ args = 0, pretend = 0, frame = 0
    @ frame_needed = 0, uses_anonymous_args = 0
    @ link register save eliminated.
@ BLOCK 2 freq:10000 seq:0
@ PRED: ENTRY [100.0%]  (fallthru)
    ldrd    r2, [r0]    @ 6    *arm_movdi/4    [length = 8]
    push    {r4, r5}    @ 20    *push_multi    [length = 2]
    movs    r4, #1    @ 16    *thumb2_movsi_shortim    [length = 2]
    adds    r2, r2, r4    @ 18    *addsi3_compare_op1/1    [length = 4]
    mov    r5, #0    @ 17    *thumb2_movsi_insn/2    [length = 4]
    adc    r3, r3, r5    @ 19    *addsi3_carryin_ltu    [length = 4]
    strd    r2, [r0]    @ 9    *arm_movdi/5    [length = 8]
@ SUCC: EXIT [100.0%] 
    pop    {r4, r5}
    bx    lr


The add is a DImode add up to the pr53447.c.195r.postreload dump:

(insn 6 3 13 2 (set (reg:DI 2 r2 [orig:137 D.4118 ] [137])
        (mem:DI (reg/v/f:SI 0 r0 [orig:136 p ] [136]) [2 *p_1(D)+0 S8 A64]))
pr53447.c:3 182 {*arm_movdi}
     (nil))

(insn 13 6 8 2 (set (reg:DI 4 r4 [139])
        (const_int 1 [0x1])) pr53447.c:3 182 {*arm_movdi}
     (expr_list:REG_EQUIV (const_int 1 [0x1])
        (nil)))

(insn 8 13 9 2 (parallel [ 
            (set (reg:DI 2 r2 [orig:137 D.4118 ] [137])
                (plus:DI (reg:DI 2 r2 [orig:137 D.4118 ] [137])
                    (reg:DI 4 r4 [139])))
            (clobber (reg:CC 24 cc))
        ]) pr53447.c:3 1 {*arm_adddi3}
     (nil))         

(insn 9 8 12 2 (set (mem:DI (reg/v/f:SI 0 r0 [orig:136 p ] [136]) [2 *p_1(D)+0
S8 A64])
        (reg:DI 2 r2 [orig:137 D.4118 ] [137])) pr53447.c:3 182 {*arm_movdi}
     (nil)) 



The add is split in the pr53447.c.197r.split2 dump:

(insn 6 3 16 2 (set (reg:DI 2 r2 [orig:137 D.4118 ] [137])
        (mem:DI (reg/v/f:SI 0 r0 [orig:136 p ] [136]) [2 *p_1(D)+0 S8 A64]))
pr53447.c:3 182 {*arm_movdi}
     (nil)) 

(insn 16 6 17 2 (set (reg:SI 4 r4 [139])
        (const_int 1 [0x1])) pr53447.c:3 718 {*thumb2_movsi_insn}
     (nil))

(insn 17 16 18 2 (set (reg:SI 5 r5 [+4 ])
        (const_int 0 [0])) pr53447.c:3 718 {*thumb2_movsi_insn}
     (nil))

(insn 18 17 19 2 (parallel [
            (set (reg:CC_C 24 cc)
                (compare:CC_C (plus:SI (reg:SI 2 r2 [orig:137 D.4118 ] [137])
                        (reg:SI 4 r4 [139]))
                    (reg:SI 2 r2 [orig:137 D.4118 ] [137])))
            (set (reg:SI 2 r2 [orig:137 D.4118 ] [137])
                (plus:SI (reg:SI 2 r2 [orig:137 D.4118 ] [137])
                    (reg:SI 4 r4 [139])))
        ]) pr53447.c:3 10 {*addsi3_compare_op1}
     (nil))

(insn 19 18 9 2 (set (reg:SI 3 r3 [ D.4118+4 ])
        (plus:SI (plus:SI (reg:SI 3 r3 [ D.4118+4 ])
                (reg:SI 5 r5 [+4 ]))
            (ltu:SI (reg:CC_C 24 cc)
                (const_int 0 [0])))) pr53447.c:3 14 {*addsi3_carryin_ltu}
     (nil))

(insn 9 19 12 2 (set (mem:DI (reg/v/f:SI 0 r0 [orig:136 p ] [136]) [2 *p_1(D)+0
S8 A64])
        (reg:DI 2 r2 [orig:137 D.4118 ] [137])) pr53447.c:3 182 {*arm_movdi}
     (nil))