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[Bug rtl-optimization/51821] [4.5/4.6/4.7 Regression] 64bit > 32bit conversion produces incorrect results with optimizations
- From: "ubizjak at gmail dot com" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Thu, 12 Jan 2012 11:42:00 +0000
- Subject: [Bug rtl-optimization/51821] [4.5/4.6/4.7 Regression] 64bit > 32bit conversion produces incorrect results with optimizations
- Auto-submitted: auto-generated
- References: <bug-51821-4@http.gcc.gnu.org/bugzilla/>
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=51821
--- Comment #14 from Uros Bizjak <ubizjak at gmail dot com> 2012-01-12 11:42:00 UTC ---
(In reply to comment #12)
> I'm not sure I understand. If the peephole matches, then the insn pattern is
> present in the insn stream with instantiated registers, so it's sufficient to
> scan the insn stream. AFAICS the code doesn't see that edx is live after the
> instruction because DF reports that only eax is; of course it's eax in DImode
> so edx is "implicitly" live, but it's nevertheless live.
A comment to "implicitly" live: my second example (Comment #9) marks ax
register as available, but IT IS SET in the pattern! This supports the theory
outlined in the Comment #13, but df_simulate_one_insn_forwards now marks unused
register ax as available. Again, live analysis is not the correct tool to
determine which registers are clobbered by the insn.