[Bug rtl-optimization/27468] sign-extending Alpha instructions not exploited

["ubizjak at gmail dot com" <gcc-bugzilla at gcc dot gnu dot org>]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=27468

--- Comment #5 from Uros Bizjak <ubizjak at gmail dot com> 2011-12-22 10:25:10 UTC ---
With proposed patch to enable REE pass, we still generate:

0000000000000000 <f5>:
   0:   20 05 f0 43     negq    a0,v0
   4:   c0 08 10 46     cmovge  a0,a0,v0
   8:   00 00 e0 43     sextl   v0,v0
   c:   01 80 fa 6b     ret

However, we need a sign extend somewhere, and in above case, we apply sign
extension to the result, where Compaq C applies extension to the arguments of
cmove. These sequences are equivalent an all aspects.

FYI: Proposed "optimal" f5 sequence is wrong. Since cmov always operates on the
whole DImode register, garbage in bits 31+ of a0 can pass unmodified to the
function result. Compaq C is correct to produce:

0000000000000000 <f5>:
   0:    10 00 f0 43     sextl    a0,a0
   4:    20 01 f0 43     negl    a0,v0
   8:    c0 08 10 46     cmovge    a0,a0,v0
   c:    00 00 fe 2f     unop    
  10:    01 80 fa 6b     ret

but this is effectively no different than gcc sequence above.