[Bug target/50751] SH Target: Displacement addressing does not work for QImode and HImode

["oleg dot endo at t-online dot de" <gcc-bugzilla at gcc dot gnu dot org>]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50751

--- Comment #9 from Oleg Endo <oleg.endo@t-online.de> 2011-10-27 09:23:47 UTC ---
Created attachment 25625
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=25625
Stripped reload test case from bzip2

(In reply to comment #8)
> 
> and RA chooses r1 and r0 as the registers to where memories will
> be loaded.  The problem is we have no direct way to load buf1[4]
> to r1.  In such situation, a secondary reload is needed.  See
> the description of TARGET_SECONDARY_RELOAD in the gcc manual.
> Here is a trial:

Thanks a lot!

> 
> The ICE for your testcase went away with it, though I've got
> [...]
> spill_failure, at reload1.c:2118
> 
> when bootstrapping.

So this passes the ball to the mov.b (R0,Rn),Rm insn...
The same happens with bzip2 in CSiBE.  I have attached a stripped down
snippet that reproduces the problem.

IRA's last words on that one are:

Using reg 2 for reload 0
Spilling for insn 365.
Using reg 2 for reload 0
Spilling for insn 371.
Using reg 3 for reload 0
Spilling for insn 374.
Using reg 2 for reload 0
Spilling for insn 377.
Using reg 0 for reload 1
reload failure for reload 2

Reloads for insn # 377
Reload 0: reload_in (SI) = (plus:SI (reg/f:SI 15 r15)
                                                    (const_int 16 [0x10]))
    GENERAL_REGS, RELOAD_FOR_INPUT_ADDRESS (opnum = 2), can't combine
    reload_in_reg: (plus:SI (reg/f:SI 15 r15)
                                                    (const_int 16 [0x10]))
Reload 1: reload_in (SI) = (reg:SI 3 r3 [693])
    R0_REGS, RELOAD_FOR_INPUT (opnum = 0)
    reload_in_reg: (reg:SI 3 r3 [693])
Reload 2: R0_REGS, RELOAD_FOR_INPUT_ADDRESS (opnum = 2), can't combine,
secondary_reload_p
Reload 3: reload_in (QI) = (mem/c:QI (plus:SI (reg/f:SI 15 r15)
                                                        (const_int 16 [0x10]))
[6 %sfp+-60 S1 A32])
    GENERAL_REGS, RELOAD_FOR_INPUT (opnum = 2), can't combine
    reload_in_reg: (subreg:QI (reg/v:SI 177 [ curr ]) 0)
    secondary_in_reload = 2