[Bug target/50751] SH Target: Displacement addressing does not work for QImode and HImode

["oleg dot endo at t-online dot de" <gcc-bugzilla at gcc dot gnu dot org>]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50751

--- Comment #7 from Oleg Endo <oleg.endo@t-online.de> 2011-10-26 23:07:08 UTC ---
Created attachment 25622
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=25622
asmcons and ira pass log for the reload failure of "z" insn constraint

(In reply to comment #5)
> It seems that clobbering R0 in that expander is simply papering
> over the real problem.  

Yes, it is very much.

> Although the reload issue beyonds me,
> .ira dump file about that impossible insn which doesn't satisfy
> the "z" constraint would be a starting point.

I've been trying to make some sense out of it since, but I'm a bit clueless at
the moment here.

The following function is a reduced failure example:

int fail (char* buf0, char* buf1)
{
  char a,b,c;

  a = buf0[0] + buf1[1];
  b = buf0[5] + buf1[4];
  c = buf0[15] + buf1[14];
  return a+b-c;
}

In the attached log the problematic pseudo reg is reg:QI 191, where it is
reloaded into r1... 

Reloads for insn # 13
Reload 0: reload_in (QI) = (reg:QI 191 [ MEM[(char *)buf1_4(D) + 4B] ])
    reload_out (SI) = (reg:SI 1 r1 [193])
    GENERAL_REGS, RELOAD_OTHER (opnum = 0)


Strange thing is that the following variant does not cause the error:

int fail (char* buf0, char* buf1, char* out)
{
  char a,b,c;

  a = buf0[0] + buf1[1];
  b = buf0[5] + buf1[4];
  c = buf0[15] + buf1[14];
  *out = a+b-c;
  return *out;
}