[Bug target/50788] [4.7 Regression] ICE: in merge_overlapping_regs, at regrename.c:318 with -mavx -fpeel-loops -fstack-protector-all and __builtin_ia32_maskloadpd256

["ubizjak at gmail dot com" <gcc-bugzilla at gcc dot gnu dot org>]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50788

--- Comment #5 from Uros Bizjak <ubizjak at gmail dot com> 2011-10-23 10:59:21 UTC ---
(In reply to comment #3)

> but the expanders have match_dup.  Uros, would you mind taking it over?  TIA.

It is OK for expanders to have match_dup. We just don't want to have
post-reload passes to trip on double-output to the same register.

BTW: There is another spot with similar problem:

@@ -8011,7 +8011,8 @@
   [(set (mem:V16QI (match_operand:P 0 "register_operand" "D"))
     (unspec:V16QI [(match_operand:V16QI 1 "register_operand" "x")
                (match_operand:V16QI 2 "register_operand" "x")
-               (mem:V16QI (match_dup 0))]
+               (mem:V16QI
+             (match_operand:P 3 "register_operand" "0"))]
               UNSPEC_MASKMOV))]
   "TARGET_SSE2"
   "%vmaskmovdqu\t{%2, %1|%1, %2}"

While compilation won't break here, IMO we should tell the reload that we have
matching constraint.

BTW: This fun is all due to conditional maskmov store. We can't just set the
memory, since preceding stores to the same location will be simply deleted.