This is the mail archive of the
gcc-bugs@gcc.gnu.org
mailing list for the GCC project.
[Bug target/47764] The constant load instruction should be hoisted out of loop
- From: "ramana at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Wed, 10 Aug 2011 22:17:23 +0000
- Subject: [Bug target/47764] The constant load instruction should be hoisted out of loop
- Auto-submitted: auto-generated
- References: <bug-47764-4@http.gcc.gnu.org/bugzilla/>
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47764
Ramana Radhakrishnan <ramana at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
CC| |ramana at gcc dot gnu.org
--- Comment #4 from Ramana Radhakrishnan <ramana at gcc dot gnu.org> 2011-08-10 22:17:23 UTC ---
(In reply to comment #3)
> > Any ideas of how this improvement could be implemented, Carrot?
>
> The root cause of this problem is that arm/thumb store instruction can't
> directly store a immediate number to memory, but gcc doesn't realize this early
> enough. In most part of the rtl phase, the following form is kept.
>
> (insn 41 38 42 3 (set (mem:HI (plus:SI (reg/f:SI 169)
> (const_int 60 [0x3c])) [2 MEM[(struct deflate_state *)D.2085
> _3 + 60B]+0 S2 A16])
> (const_int 0 [0])) src/trees.c:45 696 {*thumb2_movhi_insn}
> (expr_list:REG_DEAD (reg/f:SI 169)
> (nil)))
>
> Until register allocation it finds the restriction of the store instruction and
> split it into two instructions, load 0 into register and store register to
> memory. But it's too late to do a loop optimization.
Eh, how is splitting this early going to help with hoisting this out of a loop
?
Ramana