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[Bug target/49746] Generated PA-RISC2.0w code cannot be assembled by GNU as-2.21.1
- From: "dave.anglin at bell dot net" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Thu, 14 Jul 2011 22:06:54 +0000
- Subject: [Bug target/49746] Generated PA-RISC2.0w code cannot be assembled by GNU as-2.21.1
- Auto-submitted: auto-generated
- References: <bug-49746-4@http.gcc.gnu.org/bugzilla/>
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49746
--- Comment #3 from dave.anglin at bell dot net 2011-07-14 22:06:49 UTC ---
On 7/14/2011 4:35 PM, sje at cup dot hp.com wrote:
> http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49746
>
> --- Comment #2 from Steve Ellcey<sje at cup dot hp.com> 2011-07-14 20:34:28 UTC ---
> Are you trying to use a 32 bit GCC to bootstrap a 64 bit GCC? I see you have
> CC set to gcc64 which makes me think that you are using a 64 bit GCC to do the
> bootstrap but you have -mpa-risc-2-0 in CFLAGS, which I think means the 32 bit
> 2.0 instruction set and I don't think it should be used for 64 bit builds.
>
> Can you bootstrap if you leave off the -mpa-risc-2-0 flag
The flag shouldn't matter. hppa64 is always PA 2.0. hppa64 is also
always PIC, so -fPIC is
also redundant.
The issue is with the bootstrap compiler gcc64. Is it actually 3.4.6
(gcc64 -v)? Did gmp and
mpfr compile and check ok with it? These need to be 64-bit.
The 64-bit 3.X versions of hppa64 were somewhat buggy and there were
also some buggy distributions.
If your gcc64 compiled gmp and mpfr ok, I would suggest trying to build
a early 4.X release, then jump
to 4.6. This may avoid the out of range field.
I think that you also need a separate 64-bit version of gas. I'm not
sure SOM and ELF can be supported
with a single gas binary. HP uses a wrapper. I always compiler two
separate versions of binutils.
GCC on PA-RISC can't easily support both 32 and 64-bit targets because
of the differences between
SOM and ELF.
This is not a blocker since the bug is in the bootstrap compiler.
If you add -save-temps to the failing compile, this will save the
assembler output. This will allow
inspection of the problematic instructions. I would guess we are
dealing with a bl or b instruction.
A b,l instruction would have a 21-bit range.
Dave