[Bug middle-end/49719] [4.7 Regression] test gcc.target/arm/sibcall-1.c fails for ARM

["ebotcazou at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49719

Eric Botcazou <ebotcazou at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |NEW
   Last reconfirmed|                            |2011.07.13 09:45:43
                 CC|                            |ebotcazou at gcc dot
                   |                            |gnu.org
     Ever Confirmed|0                           |1

--- Comment #1 from Eric Botcazou <ebotcazou at gcc dot gnu.org> 2011-07-13 09:45:43 UTC ---
The sibcall still works on x86 but is indeed disabled on ARM because of the
lack of [reg+disp] addressing mode.  While on x86 you have:

(insn 15 14 16 3 (set (reg:SI 67)
        (mem/s/c:SI (plus:SI (reg/f:SI 53 virtual-incoming-args)
                (const_int 32 [0x20])) [3 a+8 S4 A32])) sibcall-1.c:22 -1
     (nil))

(insn 16 15 17 3 (set (mem:SI (plus:SI (reg/f:SI 53 virtual-incoming-args)
                (const_int 16 [0x10])) [0 S4 A32])
        (reg:SI 67)) sibcall-1.c:22 -1
     (nil))

on ARM you have instead:

(insn 21 10 22 3 (set (reg:SI 143)
        (reg/f:SI 131 virtual-outgoing-args)) sibcall-1.c:22 -1
     (nil))

(insn 22 21 23 3 (set (reg:SI 144)
        (plus:SI (reg/f:SI 128 virtual-incoming-args)
            (const_int 16 [0x10]))) sibcall-1.c:22 -1
     (nil))

(insn 23 22 24 3 (parallel [
            (set (reg:SI 0 r0)
                (mem/s/c:SI (reg:SI 144) [3 a+8 S4 A32]))
            (set (reg:SI 1 r1)
                (mem/s/c:SI (plus:SI (reg:SI 144)
                        (const_int 4 [0x4])) [3 a+12 S4 A32]))
        ]) sibcall-1.c:22 -1
     (nil))

(insn 24 23 25 3 (parallel [
            (set (mem:SI (reg:SI 143) [0 S4 A32])
                (reg:SI 0 r0))
            (set (mem:SI (plus:SI (reg:SI 143)
                        (const_int 4 [0x4])) [0 S4 A32])
                (reg:SI 1 r1))
        ]) sibcall-1.c:22 -1
     (nil))

so mem_overlaps_already_clobbered_arg_p doesn't see the displacement in the
effective address of the load.  Quite annoying.