[Bug target/49521] New: [arm] Bad PIC register load in for static initializers

["rmansfield at qnx dot com" <gcc-bugzilla at gcc dot gnu dot org>]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49521

           Summary: [arm] Bad PIC register load in for static initializers
           Product: gcc
           Version: 4.7.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
        AssignedTo: unassigned@gcc.gnu.org
        ReportedBy: rmansfield@qnx.com
              Host: x86_64-linux-gnu
            Target: arm-unknown-linux-gnu
             Build: x86_64-linux-gnu


$ ./xgcc -v
../configure --target=arm-unknown-linux-gnu
--prefix=/home/ryan/x-tools/arm-unknown-linux-gnu
--with-headers=/home/ryan/x-tools/arm-unknown-linux-gnu/arm-unknown-linux-gnu/include
--with-local-prefix=/home/ryan/x-tools/arm-unknown-linux-gnu/arm-unknown-linux-gnu
--disable-nls --enable-threads=posix --enable-symvers=gnu --enable-__cxa_atexit
--enable-languages=c++ --enable-shared --enable-c99 --enable-long-long
Thread model: posix
gcc version 4.6.1 20110518 (prerelease) [gcc-4_6-branch revision 173875] (GCC) 


Yes, this only happens with the old ABI but this wrong-code seems to happens
very frequently. 

$ ./xgcc -B. -fpic -O2 ~/t.ii -S

_GLOBAL__sub_I_t.ii:
        @ args = 0, pretend = 0, frame = 116
        @ frame_needed = 1, uses_anonymous_args = 0
        stmfd   sp!, {fp, lr}
        ldr     r1, .L1064  <- load GOT offset
        add     fp, sp, #4
        sub     sp, sp, #116
        mov     r0, #0 
        ldr     r1, [r0, r1] <- crash

<snip>

.L1064:
        .word   __gxx_personality_sj0(GOT)


(note 2 354 264 NOTE_INSN_FUNCTION_BEG)

(insn 264 2 287 (set (reg:SI 2 r2)
        (const_int 0 [0])) 168 {*arm_movsi_insn}
     (expr_list:REG_EQUAL (const_int 0 [0])
        (nil)))

(insn 287 264 288 (set (reg:SI 3 r3 [275])
        (unspec:SI [
                (mem:SI (label_ref 364) [0 S4 A32])
            ] 3)) 170 {pic_load_addr_32bit}
     (expr_list:REG_EQUIV (unspec:SI [
                (symbol_ref:SI ("__gxx_personality_sj0") [flags 0x41])
            ] 3)
        (nil)))

(insn 288 287 229 (set (reg/f:SI 3 r3 [256])
        (mem:SI (plus:SI (reg:SI 2 r2)
                (reg:SI 3 r3 [275])) [0 S4 A32])) 168 {*arm_movsi_insn}
     (expr_list:REG_DEAD (reg:SI 2 r2)
        (expr_list:REG_EQUIV (symbol_ref:SI ("__gxx_personality_sj0") [flags
0x41])
            (nil))))

(insn 229 288 230 (set (mem/c:SI (plus:SI (reg/f:SI 11 fp)
                (const_int -32 [0xffffffffffffffe0])) [0 S4 A32])
        (reg/f:SI 3 r3 [256])) 168 {*arm_movsi_insn}
     (expr_list:REG_DEAD (reg/f:SI 3 r3 [256])
        (nil)))

If I explicitly specify a PIC register (e.g. -mpic-register=4), the load is
sane.

e.g.

_GLOBAL__sub_I_t.ii:
        @ args = 0, pretend = 0, frame = 112
        @ frame_needed = 1, uses_anonymous_args = 0
        stmfd   sp!, {r4, fp, lr}
        ldr     r4, .L1064
        add     fp, sp, #8
        ldr     r2, .L1064+4
        sub     sp, sp, #112
        ldr     r1, .L1064+8
        ldr     r0, .L1064+12
.LPIC227:
        add     r4, pc, r4
        ldr     r3, .L1064+16
        ldr     r1, [r4, r1]

<snip>
.L1064:
        .word   _GLOBAL_OFFSET_TABLE_-(.LPIC227+8)
        .word   .LLSDA1449-(.LPIC224+8)
        .word   __gxx_personality_sj0(GOT)