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[Bug rtl-optimization/48143] [4.6/4.7 Regression] ICE: in reset_sched_cycles_in_current_ebb, at sel-sched.c:7114 with custom flags
- From: "ubizjak at gmail dot com" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Fri, 18 Mar 2011 16:39:50 +0000
- Subject: [Bug rtl-optimization/48143] [4.6/4.7 Regression] ICE: in reset_sched_cycles_in_current_ebb, at sel-sched.c:7114 with custom flags
- Auto-submitted: auto-generated
- References: <bug-48143-4@http.gcc.gnu.org/bugzilla/>
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48143
--- Comment #3 from Uros Bizjak <ubizjak at gmail dot com> 2011-03-18 16:39:36 UTC ---
(In reply to comment #2)
> We ICE because we again issue more than issue_rate insns. And this happens
> because we hit an insn which does not modify the DFA state at all, thus we do
> not account for it when checking that we obey issue_rate limits. The insn is
> coming from sse2_cvtps2pd pattern of sse.md and it doesn't have a reservation
> (has "nothing").
>
> I don't have any idea how the pattern attributes should be fixed, but the
> following seems to work on the test case. Uros, does this make sense?
Sure, but there are some other patterns missing athlon_decode attribute:
*sse2_cvtpd2dq
*sse2_cvttpd2dq
sse2_cvtss2sd
*sse2_cvtpd2ps
sse2_cvtps2pd
Can you please add missing athlon_decode attribute also for these?
Patch is pre-approved for 4.7 and needs RM approval for 4.6.