[Bug rtl-optimization/42499] Bad register allocation in multiplication code by constant

["ramana at gcc dot gnu dot org" <gcc-bugzilla at gcc dot gnu dot org>]

------- Comment #2 from ramana at gcc dot gnu dot org  2010-01-05 18:28 -------
Why is there no load of tv.tv_usec in the code generated that you've pasted?
Are you sure you've pasted this right ? 

With 4.4 arm-eabi - 17/12/2009 snapshot I see the following code ?

for -march=armv5te -mthumb -Os . Are you sure you have given the right options
here ? 



        .arch armv5te
        .fpu softvfp
        .eabi_attribute 20, 1
        .eabi_attribute 21, 1
        .eabi_attribute 23, 3
        .eabi_attribute 24, 1
        .eabi_attribute 25, 1
        .eabi_attribute 26, 1
        .eabi_attribute 30, 4
        .eabi_attribute 18, 4
        .code   16
        .file   "t.c"
        .global __aeabi_idiv
        .text
        .align  2
        .global test
        .code   16
        .thumb_func
        .type   test, %function
test:
        push    {r4, r5, r6, r7, lr}
        sub     sp, sp, #28
        add     r4, sp, #16
        str     r0, [sp, #12]
        mov     r0, r4
        bl      get_time
        mov     r1, #250
        ldr     r0, [r4, #4]
        lsl     r1, r1, #2
        bl      __aeabi_idiv
        ldr     r7, [sp, #16]
        mov     r3, r7
        asr     r7, r7, #31
        mov     r4, r7
        lsl     r7, r7, #5
        lsr     r1, r3, #27
        mov     r2, r7
        orr     r2, r2, r1
        str     r2, [sp, #4]
        mov     r5, r0
        asr     r6, r0, #31
        lsl     r0, r3, #5
        str     r0, [sp]
        ldr     r0, [sp]
        ldr     r1, [sp, #4]
        sub     r0, r0, r3
        sbc     r1, r1, r4
        str     r0, [sp]
        str     r1, [sp, #4]
        ldr     r1, [sp]
        ldr     r7, [sp, #4]
        lsr     r0, r1, #30
        lsl     r2, r7, #2
        orr     r2, r2, r0
        ldr     r0, [sp]
        lsl     r1, r0, #2
        mov     r0, r1
        mov     r1, r2
        add     r0, r0, r3
        adc     r1, r1, r4
        lsr     r4, r0, #29
        lsl     r3, r1, #3
        orr     r3, r3, r4
        ldr     r1, [sp, #12]
        lsl     r2, r0, #3
        add     r5, r5, r2
        adc     r6, r6, r3
        add     sp, sp, #28
        str     r5, [r1]
        str     r6, [r1, #4]
        @ sp needed for prologue
        pop     {r4, r5, r6, r7, pc}
        .size   test, .-test
        .ident  "GCC: (GNU) 4.4.3 20091217 (prerelease)"


-- 

ramana at gcc dot gnu dot org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |WAITING


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=42499