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[Bug tree-optimization/38785] huge performance regression on EEMBC bitmnp01
- From: "steven at gcc dot gnu dot org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: 20 Jan 2009 23:02:00 -0000
- Subject: [Bug tree-optimization/38785] huge performance regression on EEMBC bitmnp01
- References: <bug-38785-5394@http.gcc.gnu.org/bugzilla/>
- Reply-to: gcc-bugzilla at gcc dot gnu dot org
------- Comment #13 from steven at gcc dot gnu dot org 2009-01-20 23:01 -------
Created an attachment (id=17155)
--> (http://gcc.gnu.org/bugzilla/attachment.cgi?id=17155&action=view)
Throttle PRE, hookize SMALL_REGISTER_CLASSES
This is the patch I have in my local tree (bootstrapped&tested on AMD64
multilib).
It's rather brute-force, but it shows what I would do: There is a new function
want_to_pre_p that you can feed an expression to decide whether to perform the
redundancy elimination or not.
For x86 normal PRE (i.e. not PPRE) I toyed, quite successfully, with the idea
to make the transformation depend on the probability that a PRE-ed expression
will result in spills. I have not investigated at all whether there is a
difference for PPRE and PRE in the want_to_pre_p decision. Some of Joern's
ideas, and more (or less) should be included in this want_to_pre_p function.
--
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=38785