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[Bug middle-end/37908] [4.2/4.3/4.4 regression] atomic NAND op generate wrong code; __sync_nand_and_fetch, __sync_fetch_and_nand
- From: "kokseng at ieee dot org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: 29 Oct 2008 09:37:48 -0000
- Subject: [Bug middle-end/37908] [4.2/4.3/4.4 regression] atomic NAND op generate wrong code; __sync_nand_and_fetch, __sync_fetch_and_nand
- References: <bug-37908-16859@http.gcc.gnu.org/bugzilla/>
- Reply-to: gcc-bugzilla at gcc dot gnu dot org
------- Comment #7 from kokseng at ieee dot org 2008-10-29 09:37 -------
The only problem is whether there are codes out there that depend on
"NEGATE-and-AND"? Frankly speaking, when I was reminded about the 'nand'
comment on gcc manual, only then I remembered many moons ago, I read that line,
and also remembered saying to myself "W-T-F". However, many moons later, when
I work on porting to other processor and test-the-unit-test, I relied on
text-book and historical definition of the term 'NAND'. So, I think it is not
an issue of what Intel ICC did, it is matter of getting the semantic of NAND
the way any programmer was taught and practiced.
Propagating a misnomer will only guarantee that this issue of " NAND is not
NAND but 'N'AND" will come back to haunt every now-and-then. IMHO, it is
better to bite the bullet now then swallow a canon later.
:-)
--
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=37908