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[Bug target/32961] [4.2/4.3 Regression]: Gcc has different requirements for x86 shift xmm intrinsics



------- Comment #7 from hjl at lucon dot org  2007-10-17 21:48 -------
Icc generates:

#include <xmmintrin.h>
__m128i
foo (__m128i a, int n )
{
  a = _mm_slli_epi32( a, n );
  return a;
}
[hjl@gnu-6 tmp]$ /opt/intel/cce/10.0/bin/icc -c x.c
[hjl@gnu-6 tmp]$ objdump -d x.o

x.o:     file format elf64-x86-64

Disassembly of section .text:

0000000000000000 <foo>:
   0:   66 0f 6e cf             movd   %edi,%xmm1
   4:   66 0f f2 c1             pslld  %xmm1,%xmm0
   8:   c3                      retq   
   9:   90                      nop    
   a:   90                      nop    
   b:   90                      nop    
[hjl@gnu-6 tmp]$ 

BTW, _mm_slli_si128 maps to "pslldq" and it only takes imm as shift count.


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=32961


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