[Bug rtl-optimization/33028] New: Missed optimizations in peephole2 pass

["aesok at gcc dot gnu dot org" <gcc-bugzilla at gcc dot gnu dot org>]

Hi,

AVR backend have peephole2 for optimizing two register move instructions (mov)
in one register pair move instruction (movw):

(define_peephole2 ; movw
  [(set (match_operand:QI 0 "even_register_operand" "")
        (match_operand:QI 1 "even_register_operand" ""))
   (set (match_operand:QI 2 "odd_register_operand" "")
        (match_operand:QI 3 "odd_register_operand" ""))]
  "(AVR_HAVE_MOVW
    && REGNO (operands[0]) == REGNO (operands[2]) - 1
    && REGNO (operands[1]) == REGNO (operands[3]) - 1)"
  [(set (match_dup 4) (match_dup 5))]
  {
    operands[4] = gen_rtx_REG (HImode, REGNO (operands[0]));
    operands[5] = gen_rtx_REG (HImode, REGNO (operands[1]));
  })

Testcase:

unsigned char ADCH;
unsigned char ADCL;

unsigned int foo(void) {

  unsigned int temp = 0;  

  temp = ((ADCH<<8)|ADCL); 

  return temp;
}

# avr-gcc -Os  -mmcu=atmega16  -save-temps  -dP  -c -o demo.o demo.c

Compiled in:

.LM3:
 ; (insn 32 10 33 demo.c:34 (set (reg:QI 24 r24 [ <result> ])
 ;         (reg:QI 18 r18 [42])) 4 {*movqi} (expr_list:REG_DEAD (reg:QI 18 r18
[42])
 ;         (nil)))
        mov r24,r18      ;  32  *movqi/1        [length = 1]
 ; (insn 33 32 21 demo.c:34 (set (reg:QI 25 r25 [+1 ])
 ;         (reg:QI 19 r19 [+1 ])) 4 {*movqi} (expr_list:REG_DEAD (reg:QI 19 r19
[+1 ])
 ;         (nil)))
        mov r25,r19      ;  33  *movqi/1        [length = 1]
/* epilogue start */
 ; (jump_insn/f 40 39 41 demo.c:34 (return) 128 {return} (nil))
        ret      ;  40  return  [length = 1]

insns 32 ana 33 full match peephole, but do not optimize. If in avr.md file add
new peephole2 with three insn patterns (now avr backend use peephole2 with max
two insn patterns):


(define_peephole2 
  [(set (match_operand:QI 0 "register_operand" "")
        (match_dup 0))
   (set (match_dup 0)
        (match_dup 0))
   (set (match_dup 0)
        (match_dup 0))]
  ""
  [(set (match_dup 0) (match_dup 0))]
  {})

then two 'mov' instruction is optimized in 'movw':

.LM3:
 ; (insn 42 10 21 demo.c:34 (set (reg:HI 24 r24)
 ;         (reg:HI 18 r18)) 8 {*movhi} (nil))
        movw r24,r18     ;  42  *movhi/1        [length = 1]
/* epilogue start */
 ; (jump_insn/f 40 39 41 demo.c:34 (return) 128 {return} (nil))
        ret      ;  40  return  [length = 1]
.LFE2:


This behaviour is caused by the patch:
[patch RFA] Keep the correct peep2_current_count:
http://gcc.gnu.org/ml/gcc-patches/2005-10/msg01368.html


Anatoly.


-- 
           Summary: Missed optimizations in peephole2 pass
           Product: gcc
           Version: 4.3.0
            Status: UNCONFIRMED
          Severity: major
          Priority: P3
         Component: rtl-optimization
        AssignedTo: unassigned at gcc dot gnu dot org
        ReportedBy: aesok at gcc dot gnu dot org


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=33028