This is the mail archive of the
gcc-bugs@gcc.gnu.org
mailing list for the GCC project.
[Bug target/32523] disastrous scheduling for POWER5
- From: "pinskia at gcc dot gnu dot org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: 27 Jun 2007 16:25:30 -0000
- Subject: [Bug target/32523] disastrous scheduling for POWER5
- References: <bug-32523-12761@http.gcc.gnu.org/bugzilla/>
- Reply-to: gcc-bugzilla at gcc dot gnu dot org
------- Comment #2 from pinskia at gcc dot gnu dot org 2007-06-27 16:25 -------
PowerPC970FX is not a direct descendent of Power5. It is a descendent of the
970 which is a heavily modified Power4. Power5 is the direct descendent of the
Power4 though, at least in terms of scheduling (I don't know if in terms of the
hardware itself). So at best they are siblings rather than descendents of one
another.
The main thing is that you turned off the first scheduling pass which is before
the register allocator so I think the case is the register allocator is messing
up (which is already known). The other thing is what options are you using to
invoke GCC with? Power5 support inside GCC was not added until at least 3.4
(maybe it was 4.0).
--
pinskia at gcc dot gnu dot org changed:
What |Removed |Added
----------------------------------------------------------------------------
Component|c |target
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=32523