This is the mail archive of the
gcc-bugs@gcc.gnu.org
mailing list for the GCC project.
[Bug target/31361] SSE2 generation bug with shifts
- From: "rth at gcc dot gnu dot org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: 27 Mar 2007 00:37:03 -0000
- Subject: [Bug target/31361] SSE2 generation bug with shifts
- References: <bug-31361-11263@http.gcc.gnu.org/bugzilla/>
- Reply-to: gcc-bugzilla at gcc dot gnu dot org
------- Comment #5 from rth at gcc dot gnu dot org 2007-03-27 01:37 -------
You can shift the 32-bit portions individually. But your test case will now
result in 0,0,0,0 for all optimization levels, since the shift count is taken
from the entire xmm register. In this case, since there is an 8 in each of
the 4 32-bit portions, the shift count is extremely large.
Fixed.
--
rth at gcc dot gnu dot org changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|ASSIGNED |RESOLVED
Resolution| |FIXED
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=31361