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[Bug rtl-optimization/21485] [4.0/4.1/4.2 Regression] codegen regression due to PRE increasing register pressure
- From: "pinskia at gcc dot gnu dot org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: 10 Mar 2006 04:41:30 -0000
- Subject: [Bug rtl-optimization/21485] [4.0/4.1/4.2 Regression] codegen regression due to PRE increasing register pressure
- References: <bug-21485-10607@http.gcc.gnu.org/bugzilla/>
- Reply-to: gcc-bugzilla at gcc dot gnu dot org
------- Comment #16 from pinskia at gcc dot gnu dot org 2006-03-10 04:41 -------
Hmm, I see a missed optimization here (I want to say a PRE one too).
D.1521_32 = k_4 * 4;
D.1525_37 = (long int *) D.1521_32;
D.1526_38 = D.1525_37 + array_9;
D.1527_39 = D.1526_38 + 4B;
# VUSE <SMT.4_42>;
D.1528_40 = *D.1527_39;
if (prephitmp.27_35 < D.1528_40) goto <L2>; else goto <L3>;
<L2>:;
k_41 = k_4 + 1;
pretmp.22_23 = k_41 * 4;
pretmp.24_6 = (long int *) pretmp.22_23;
prephitmp.25_48 = pretmp.24_6 + array_9;
# VUSE <SMT.4_42>;
prephitmp.27_51 = *prephitmp.25_48;
prephitmp.27_51 here is also the same as D.1528_40. Though I don't know how to
figure this out in PRE or any other optimization. I almost want to say this is
the real cause. Looking at 3.4's asm, you don't have the extra load but for
4.0 and above you do.
--
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=21485