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[Bug target/23250] [4.0/4.1 regression] 4.0.1 switch -mcallee-super-interworking generating wrong code for ARM7TDMI
- From: "th dot r dot klein at web dot de" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: 12 Aug 2005 11:54:34 -0000
- Subject: [Bug target/23250] [4.0/4.1 regression] 4.0.1 switch -mcallee-super-interworking generating wrong code for ARM7TDMI
- References: <20050805161137.23250.th.r.klein@web.de>
- Reply-to: gcc-bugzilla at gcc dot gnu dot org
------- Additional Comments From th dot r dot klein at web dot de 2005-08-12 11:54 -------
The patch did not compiles with keyword MASK_INTERWORK
so using keyword ARM_FLAG_INTERWORK instead
--- arm.c.orig Mon May 9 14:53:19 2005
+++ arm.c Fri Aug 12 13:16:23 2005
@@ -944,6 +944,11 @@
target_flags &= ~ARM_FLAG_APCS_FRAME;
}
+ /* Callee super interworking implies thumb interworking. Adding
+ this to the flags here simplifies the logic elsewhere. */
+ if (TARGET_THUMB && TARGET_CALLEE_INTERWORKING)
+ target_flags |= ARM_FLAG_INTERWORK;
+
/* TARGET_BACKTRACE calls leaf_function_p, which causes a crash if done
from here where no function is being compiled currently. */
if ((target_flags & (THUMB_FLAG_LEAF_BACKTRACE | THUMB_FLAG_BACKTRACE))
I've got now the result
arm-elf-gcc-3.4.4 -g -Os -fPIC -mthumb -mlittle-endian -mapcs \
-march=armv4t -mcallee-super-interworking \
-c progWord.c -o 3_4_4_thumb.o
3_4_4_thumb.o: file format elf32-littlearm
Disassembly of section .text:
00000000 <progWord>:
0: e38fc001 orr ip, pc, #1 ; 0x1
4: e12fff1c bx ip
00000008 <.real_start_ofprogWord>:
8: b570 push {r4, r5, r6, lr}
.
register r10 (sl) never been used
.
52: 2000 movs r0, #0
54: bc70 pop {r4, r5, r6}
56: bc02 pop {r1}
58: 4708 bx r1
arm-elf-gcc-4.0.1 -g -Os -fPIC -mthumb -mlittle-endian -mapcs \
-march=armv4t -mcallee-super-interworking \
-c progWord.c -o 4_0_1_thumb.o
4_0_1_thumb.o: file format elf32-littlearm
Disassembly of section .text:
00000000 <progWord>:
0: e38fc001 orr ip, pc, #1 ; 0x1
4: e12fff1c bx ip
00000008 <.real_start_ofprogWord>:
8: b570 push {r4, r5, r6, lr}
a: 4656 mov r6, sl
c: b440 push {r6}
.
register r10 (sl) never been used
.
56: 2000 movs r0, #0
58: bc04 pop {r2}
5a: 4692 mov sl, r2
5c: bc70 pop {r4, r5, r6}
5e: bc02 pop {r1}
60: 4708 bx r1
This is a working version.
But it is still not optimized.
Should I open the missing otimization within an other bug entry?
--
What |Removed |Added
----------------------------------------------------------------------------
Status|RESOLVED |REOPENED
Resolution|FIXED |
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=23250