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[Bug rtl-optimization/6585] Redundant store/load instruction pairs on ix86
- From: "bruno at clisp dot org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: 27 Jun 2005 11:50:03 -0000
- Subject: [Bug rtl-optimization/6585] Redundant store/load instruction pairs on ix86
- References: <20020506130600.6585.bruno@clisp.org>
- Reply-to: gcc-bugzilla at gcc dot gnu dot org
------- Additional Comments From bruno at clisp dot org 2005-06-27 11:50 -------
Indeed, the result is much better now, nearly optimal.
As you say, the only further optimization possible is that a better
register allocation could get rid of the
movl %edx, %esi
and
movl %ebx, %edi
instructions.
--
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=6585