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[Bug target/19235] [4.0 regression] GCC generates SSE2 instructions for AthlonXP which doesn't support them.
- From: "uros at kss-loka dot si" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: 3 Jan 2005 10:30:15 -0000
- Subject: [Bug target/19235] [4.0 regression] GCC generates SSE2 instructions for AthlonXP which doesn't support them.
- References: <20050103020419.19235.drab@kepler.fjfi.cvut.cz>
- Reply-to: gcc-bugzilla at gcc dot gnu dot org
------- Additional Comments From uros at kss-loka dot si 2005-01-03 10:30 -------
This bug could be caused by:
2004-12-17 Richard Henderson <rth@redhat.com>
* config/i386/i386.c (x86_64_reg_class_name): Re-indent.
...
(movsi_1): Use 'x' instead of 'Y' constraints.
(movsi_1_nointernunit, movdi_2, movdi_1_rex64): Likewise.
(movdi_1_rex64_nointerunit): Likewise.
(movdf_nointeger, movdf_integer): Likewise. Handle SSE1. <<<
...
There is a problem with register constraints in movdf_nointeger pattern. It
looks that 'x' should be substituted by 'Y'. Patch is in testing.
--
What |Removed |Added
----------------------------------------------------------------------------
CC| |rth at gcc dot gnu dot org
AssignedTo|unassigned at gcc dot gnu |uros at kss-loka dot si
|dot org |
Status|NEW |ASSIGNED
Component|rtl-optimization |target
Last reconfirmed|2005-01-03 07:46:28 |2005-01-03 10:30:10
date| |
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19235