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[Bug middle-end/18641] [4.0 Regression] Another ICE caused by reload of a psuedo reg into f0 for a DImode expr
- From: "fjahanian at apple dot com" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: 6 Dec 2004 17:56:02 -0000
- Subject: [Bug middle-end/18641] [4.0 Regression] Another ICE caused by reload of a psuedo reg into f0 for a DImode expr
- References: <20041124011632.18641.fjahanian@apple.com>
- Reply-to: gcc-bugzilla at gcc dot gnu dot org
------- Additional Comments From fjahanian at apple dot com 2004-12-06 17:55 -------
I applied the patch to fsf-mainline (including darwin.h) and it worked for me.
I will do the bootstrap, dejagnu testing and let you know how it went. - Thanks.
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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=18641