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[Bug middle-end/18641] [4.0 Regression] Another ICE caused by reload of a psuedo reg into f0 for a DImode expr
- From: "rth at gcc dot gnu dot org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: 25 Nov 2004 22:44:19 -0000
- Subject: [Bug middle-end/18641] [4.0 Regression] Another ICE caused by reload of a psuedo reg into f0 for a DImode expr
- References: <20041124011632.18641.fjahanian@apple.com>
- Reply-to: gcc-bugzilla at gcc dot gnu dot org
------- Additional Comments From rth at gcc dot gnu dot org 2004-11-25 22:44 -------
Then I think that we have to assume that the result of L_R_A is not offsettable.
Even in the case of rs6000, I believe the definition is only *usually*
offsettable, but that this is not a 100% iron-clad guarantee. In particular,
an offset like 0x17fff would get rendered as 0x10000 + 0x7fff, and there's no
room left in the low part for any further offsetting.
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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=18641