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[Bug rtl-optimization/16967] Iterating gcse.c CPROP and PRE does not reach a fixed point
- From: "steven at gcc dot gnu dot org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: 10 Aug 2004 15:36:10 -0000
- Subject: [Bug rtl-optimization/16967] Iterating gcse.c CPROP and PRE does not reach a fixed point
- References: <20040810151043.16967.steven@gcc.gnu.org>
- Reply-to: gcc-bugzilla at gcc dot gnu dot org
------- Additional Comments From steven at gcc dot gnu dot org 2004-08-10 15:36 -------
GCSE of GC_print_hblkfreelist: 5 basic blocks, 20 passes, 6144 bytes
before store motion
(note 2 0 6 NOTE_INSN_DELETED)
(note 6 2 9 0 NOTE_INSN_EH_REGION_BEG)
(note 9 6 10 0 [bb 0] NOTE_INSN_EXPECTED_VALUE)
(insn 10 9 45 0 (set (reg/v:SI 59 [ i ])
(const_int 0 [0x0])) 36 {*movsi_1} (nil)
(nil))
(insn 45 10 47 0 (set (reg:SI 64)
(symbol_ref:SI ("GC_hblkfreelist") [flags 0x40] <var_decl 0x401ce6cc
GC_hblkfreelist>)) 36 {*movsi_1} (nil)
(nil))
(insn 47 45 49 0 (set (reg:SI 65)
(symbol_ref:SI ("GC_hblkfreelist") [flags 0x40] <var_decl 0x401ce6cc
GC_hblkfreelist>)) 36 {*movsi_1} (nil)
(nil))
(insn 49 47 51 0 (set (reg:SI 66)
(symbol_ref:SI ("GC_hblkfreelist") [flags 0x40] <var_decl 0x401ce6cc
GC_hblkfreelist>)) 36 {*movsi_1} (nil)
(nil))
(insn 51 49 53 0 (set (reg:SI 67)
(symbol_ref:SI ("GC_hblkfreelist") [flags 0x40] <var_decl 0x401ce6cc
GC_hblkfreelist>)) 36 {*movsi_1} (nil)
(nil))
(insn 53 51 55 0 (set (reg:SI 68)
(symbol_ref:SI ("GC_hblkfreelist") [flags 0x40] <var_decl 0x401ce6cc
GC_hblkfreelist>)) 36 {*movsi_1} (nil)
(nil))
(insn 55 53 57 0 (set (reg:SI 69)
(symbol_ref:SI ("GC_hblkfreelist") [flags 0x40] <var_decl 0x401ce6cc
GC_hblkfreelist>)) 36 {*movsi_1} (nil)
(nil))
(insn 57 55 59 0 (set (reg:SI 70)
(symbol_ref:SI ("GC_hblkfreelist") [flags 0x40] <var_decl 0x401ce6cc
GC_hblkfreelist>)) 36 {*movsi_1} (nil)
(nil))
(insn 59 57 61 0 (set (reg:SI 71)
(symbol_ref:SI ("GC_hblkfreelist") [flags 0x40] <var_decl 0x401ce6cc
GC_hblkfreelist>)) 36 {*movsi_1} (nil)
(nil))
(insn 61 59 63 0 (set (reg:SI 72)
(symbol_ref:SI ("GC_hblkfreelist") [flags 0x40] <var_decl 0x401ce6cc
GC_hblkfreelist>)) 36 {*movsi_1} (nil)
(nil))
(insn 63 61 65 0 (set (reg:SI 73)
(symbol_ref:SI ("GC_hblkfreelist") [flags 0x40] <var_decl 0x401ce6cc
GC_hblkfreelist>)) 36 {*movsi_1} (nil)
(nil))
(insn 65 63 67 0 (set (reg:SI 74)
(symbol_ref:SI ("GC_hblkfreelist") [flags 0x40] <var_decl 0x401ce6cc
GC_hblkfreelist>)) 36 {*movsi_1} (nil)
(nil))
(insn 67 65 69 0 (set (reg:SI 75)
(symbol_ref:SI ("GC_hblkfreelist") [flags 0x40] <var_decl 0x401ce6cc
GC_hblkfreelist>)) 36 {*movsi_1} (nil)
(nil))
(insn 69 67 71 0 (set (reg:SI 76)
(symbol_ref:SI ("GC_hblkfreelist") [flags 0x40] <var_decl 0x401ce6cc
GC_hblkfreelist>)) 36 {*movsi_1} (nil)
(nil))
(insn 71 69 73 0 (set (reg:SI 77)
(symbol_ref:SI ("GC_hblkfreelist") [flags 0x40] <var_decl 0x401ce6cc
GC_hblkfreelist>)) 36 {*movsi_1} (nil)
(nil))
(insn 73 71 75 0 (set (reg:SI 78)
(symbol_ref:SI ("GC_hblkfreelist") [flags 0x40] <var_decl 0x401ce6cc
GC_hblkfreelist>)) 36 {*movsi_1} (nil)
(nil))
(insn 75 73 77 0 (set (reg:SI 79)
(symbol_ref:SI ("GC_hblkfreelist") [flags 0x40] <var_decl 0x401ce6cc
GC_hblkfreelist>)) 36 {*movsi_1} (nil)
(nil))
(insn 77 75 79 0 (set (reg:SI 80)
(symbol_ref:SI ("GC_hblkfreelist") [flags 0x40] <var_decl 0x401ce6cc
GC_hblkfreelist>)) 36 {*movsi_1} (nil)
(nil))
(insn 79 77 81 0 (set (reg:SI 81)
(symbol_ref:SI ("GC_hblkfreelist") [flags 0x40] <var_decl 0x401ce6cc
GC_hblkfreelist>)) 36 {*movsi_1} (nil)
(nil))
(insn 81 79 83 0 (set (reg:SI 82)
(symbol_ref:SI ("GC_hblkfreelist") [flags 0x40] <var_decl 0x401ce6cc
GC_hblkfreelist>)) 36 {*movsi_1} (nil)
(nil))
(insn 83 81 41 0 (set (reg:SI 63)
(symbol_ref:SI ("GC_hblkfreelist") [flags 0x40] <var_decl 0x401ce6cc
GC_hblkfreelist>)) 36 {*movsi_1} (nil)
(nil))
(note 41 83 11 1 NOTE_INSN_LOOP_BEG)
(code_label 11 41 12 1 2 "" [1 uses])
(note 12 11 82 1 [bb 1] NOTE_INSN_EXPECTED_VALUE)
(insn 82 12 15 1 (set (reg/f:SI 61)
(symbol_ref:SI ("GC_hblkfreelist") [flags 0x40] <var_decl 0x401ce6cc
GC_hblkfreelist>)) 36 {*movsi_1} (nil)
(expr_list:REG_EQUAL (symbol_ref:SI ("GC_hblkfreelist") [flags 0x40]
<var_decl 0x401ce6cc GC_hblkfreelist>)
(nil)))
(insn 15 82 16 1 (set (reg/f:SI 62)
(mem/s/f:SI (plus:SI (mult:SI (reg/v:SI 59 [ i ])
(const_int 4 [0x4]))
(symbol_ref:SI ("GC_hblkfreelist") [flags 0x40] <var_decl
0x401ce6cc GC_hblkfreelist>)) [3 GC_hblkfreelist S4 A32])) 36 {*movsi_1} (nil)
(nil))
(insn 16 15 17 1 (set (reg:CCZ 17 flags)
(compare:CCZ (reg/f:SI 62)
(const_int 0 [0x0]))) 0 {*cmpsi_ccno_1} (nil)
(nil))
(jump_insn 17 16 19 1 (set (pc)
(if_then_else (eq (reg:CCZ 17 flags)
(const_int 0 [0x0]))
(label_ref 27)
(pc))) 345 {*jcc_1} (nil)
(nil))
(note 19 17 21 2 [bb 2] NOTE_INSN_EXPECTED_VALUE)
(insn 21 19 39 2 (set (reg/v/f:SI 60 [ h.2 ])
(mem/s/f:SI (reg/v/f:SI 58 [ hhdr ]) [3 <variable>.hb_next+0 S4 A32]))
36 {*movsi_1} (nil)
(nil))
(note 39 21 22 3 NOTE_INSN_LOOP_BEG)
(code_label 22 39 23 3 5 "" [1 uses])
(note 23 22 25 3 [bb 3] NOTE_INSN_EXPECTED_VALUE)
(insn 25 23 26 3 (set (reg:CCZ 17 flags)
(compare:CCZ (reg/v/f:SI 60 [ h.2 ])
(const_int 0 [0x0]))) 0 {*cmpsi_ccno_1} (nil)
(nil))
(jump_insn 26 25 40 3 (set (pc)
(if_then_else (ne (reg:CCZ 17 flags)
(const_int 0 [0x0]))
(label_ref 22)
(pc))) 345 {*jcc_1} (nil)
(nil))
(note 40 26 27 3 NOTE_INSN_LOOP_END)
(code_label 27 40 28 4 3 "" [1 uses])
(note 28 27 30 4 [bb 4] NOTE_INSN_EXPECTED_VALUE)
(insn 30 28 31 4 (parallel [
(set (reg/v:SI 59 [ i ])
(plus:SI (reg/v:SI 59 [ i ])
(const_int 1 [0x1])))
(clobber (reg:CC 17 flags))
]) 141 {*addsi_1} (nil)
(nil))
(insn 31 30 32 4 (set (reg:CCGC 17 flags)
(compare:CCGC (reg/v:SI 59 [ i ])
(const_int 2 [0x2]))) 2 {*cmpsi_1_insn} (nil)
(nil))
(jump_insn 32 31 42 4 (set (pc)
(if_then_else (le (reg:CCGC 17 flags)
(const_int 0 [0x0]))
(label_ref 11)
(pc))) 345 {*jcc_1} (nil)
(nil))
(note 42 32 35 4 NOTE_INSN_LOOP_END)
(note 35 42 0 NOTE_INSN_PROLOGUE_END)
ST_avail and ST_antic (shown under loads..)
LDST list:
Deleted 21 trivially dead insns; 2 iterations
;; Processing block from 2 to 11, 1 sets.
;; Processing block from 12 to 22, 4 sets.
;; Processing block from 23 to 40, 2 sets.
;; Processing block from 28 to 42, 4 sets.
try_optimize_cfg iteration 1
;; Processing block from 2 to 11, 1 sets.
;; Processing block from 12 to 22, 4 sets.
;; Processing block from 23 to 40, 2 sets.
;; Processing block from 28 to 42, 4 sets.
(note 2 0 6 NOTE_INSN_DELETED)
(note 6 2 9 0 NOTE_INSN_EH_REGION_BEG)
;; Start of basic block 0, registers live: (nil)
(note 9 6 10 0 [bb 0] NOTE_INSN_EXPECTED_VALUE)
(insn 10 9 41 0 (set (reg/v:SI 59 [ i ])
(const_int 0 [0x0])) 36 {*movsi_1} (nil)
(nil))
;; End of basic block 0, registers live:
(nil)
(note 41 10 11 1 NOTE_INSN_LOOP_BEG)
;; Start of basic block 1, registers live: (nil)
(code_label 11 41 12 1 2 "" [1 uses])
(note 12 11 15 1 [bb 1] NOTE_INSN_EXPECTED_VALUE)
(insn 15 12 16 1 (set (reg/f:SI 62)
(mem/s/f:SI (plus:SI (mult:SI (reg/v:SI 59 [ i ])
(const_int 4 [0x4]))
(symbol_ref:SI ("GC_hblkfreelist") [flags 0x40] <var_decl
0x401ce6cc GC_hblkfreelist>)) [3 GC_hblkfreelist S4 A32])) 36 {*movsi_1} (nil)
(nil))
(insn 16 15 17 1 (set (reg:CCZ 17 flags)
(compare:CCZ (reg/f:SI 62)
(const_int 0 [0x0]))) 0 {*cmpsi_ccno_1} (nil)
(nil))
(jump_insn 17 16 19 1 (set (pc)
(if_then_else (eq (reg:CCZ 17 flags)
(const_int 0 [0x0]))
(label_ref 27)
(pc))) 345 {*jcc_1} (nil)
(nil))
;; End of basic block 1, registers live:
(nil)
;; Start of basic block 2, registers live: (nil)
(note 19 17 21 2 [bb 2] NOTE_INSN_EXPECTED_VALUE)
(insn 21 19 39 2 (set (reg/v/f:SI 60 [ h.2 ])
(mem/s/f:SI (reg/v/f:SI 58 [ hhdr ]) [3 <variable>.hb_next+0 S4 A32]))
36 {*movsi_1} (nil)
(nil))
;; End of basic block 2, registers live:
(nil)
(note 39 21 22 3 NOTE_INSN_LOOP_BEG)
;; Start of basic block 3, registers live: (nil)
(code_label 22 39 23 3 5 "" [1 uses])
(note 23 22 25 3 [bb 3] NOTE_INSN_EXPECTED_VALUE)
(insn 25 23 26 3 (set (reg:CCZ 17 flags)
(compare:CCZ (reg/v/f:SI 60 [ h.2 ])
(const_int 0 [0x0]))) 0 {*cmpsi_ccno_1} (nil)
(nil))
(jump_insn 26 25 40 3 (set (pc)
(if_then_else (ne (reg:CCZ 17 flags)
(const_int 0 [0x0]))
(label_ref 22)
(pc))) 345 {*jcc_1} (nil)
(nil))
;; End of basic block 3, registers live:
(nil)
(note 40 26 27 3 NOTE_INSN_LOOP_END)
;; Start of basic block 4, registers live: (nil)
(code_label 27 40 28 4 3 "" [1 uses])
(note 28 27 30 4 [bb 4] NOTE_INSN_EXPECTED_VALUE)
(insn 30 28 31 4 (parallel [
(set (reg/v:SI 59 [ i ])
(plus:SI (reg/v:SI 59 [ i ])
(const_int 1 [0x1])))
(clobber (reg:CC 17 flags))
]) 141 {*addsi_1} (nil)
(nil))
(insn 31 30 32 4 (set (reg:CCGC 17 flags)
(compare:CCGC (reg/v:SI 59 [ i ])
(const_int 2 [0x2]))) 2 {*cmpsi_1_insn} (nil)
(nil))
(jump_insn 32 31 42 4 (set (pc)
(if_then_else (le (reg:CCGC 17 flags)
(const_int 0 [0x0]))
(label_ref 11)
(pc))) 345 {*jcc_1} (nil)
(nil))
;; End of basic block 4, registers live:
(nil)
(note 42 32 35 4 NOTE_INSN_LOOP_END)
(note 35 42 0 NOTE_INSN_PROLOGUE_END)
--
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=16967