This is the mail archive of the
gcc-bugs@gcc.gnu.org
mailing list for the GCC project.
[Bug target/13250] [SH] Gcc code for rotation clobbers the register, but gcc continues to use the register as if it was not clobbered
- From: "kkojima at gcc dot gnu dot org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: 27 May 2004 03:19:07 -0000
- Subject: [Bug target/13250] [SH] Gcc code for rotation clobbers the register, but gcc continues to use the register as if it was not clobbered
- References: <20031201014925.13250.uwe@netbsd.org>
- Reply-to: gcc-bugzilla at gcc dot gnu dot org
------- Additional Comments From kkojima at gcc dot gnu dot org 2004-05-27 03:19 -------
This looks an SH target specific problem when generating rtl for rotation
like (e << 8) | (e >> 24). It seems the patch below for sh.md fixes this.
I'll propose it to gcc-patch list after bootstrap and regtest.
--- ORIG/gcc/gcc/config/sh/sh.md 2004-05-14 10:08:34.000000000 +0900
+++ LOCAL/gcc/gcc/config/sh/sh.md 2004-05-27 08:32:37.000000000 +0900
@@ -2194,7 +2194,7 @@
parts[0] = gen_reg_rtx (SImode);
parts[1] = gen_reg_rtx (SImode);
emit_insn (gen_rotlsi3_16 (parts[2-choice], operands[1]));
- parts[choice-1] = operands[1];
+ emit_move_insn (parts[choice-1], operands[1]);
emit_insn (gen_ashlsi3 (parts[0], parts[0], GEN_INT (8)));
emit_insn (gen_lshrsi3 (parts[1], parts[1], GEN_INT (8)));
emit_insn (gen_iorsi3 (operands[0], parts[0], parts[1]));
--
What |Removed |Added
----------------------------------------------------------------------------
AssignedTo|unassigned at gcc dot gnu |kkojima at gcc dot gnu dot
|dot org |org
Status|NEW |ASSIGNED
Component|rtl-optimization |target
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=13250