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[Bug target/14255] i386 backend should be teached how to use divl
- From: "bernie at develer dot com" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: 23 Feb 2004 20:36:07 -0000
- Subject: [Bug target/14255] i386 backend should be teached how to use divl
- References: <20040223080809.14255.bernie@develer.com>
- Reply-to: gcc-bugzilla at gcc dot gnu dot org
------- Additional Comments From bernie at develer dot com 2004-02-23 20:36 -------
Not needed. The code generation pass already recognizes
the division/modulo combo and looks for a pattern named
"divmod??4".
On the m68k, 32/32 -> 32q+32r operations are nicely
converted to a single instruction:
(define_expand "divmodsi4"
[(parallel
[(set (match_operand:SI 0 "nonimmediate_operand" "")
(div:SI (match_operand:SI 1 "general_operand" "")
(match_operand:SI 2 "general_src_operand" "")))
(set (match_operand:SI 3 "nonimmediate_operand" "")
(mod:SI (match_dup 1) (match_dup 2)))])]
"TARGET_68020 || TARGET_CF_HWDIV"
"")
(define_insn ""
[(set (match_operand:SI 0 "nonimmediate_operand" "=d")
(div:SI (match_operand:SI 1 "general_operand" "0")
(match_operand:SI 2 "general_src_operand" "dmSTK")))
(set (match_operand:SI 3 "nonimmediate_operand" "=d")
(mod:SI (match_dup 1) (match_dup 2)))]
"TARGET_68020"
{
if (find_reg_note (insn, REG_UNUSED, operands[3]))
return "divs%.l %2,%0";
else
return "divsl%.l %2,%3:%0";
})
--
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=14255