[Bug ada/13713] [3.4/3.5 regression] gnat1 segmentation fault in stage 3 on hppa-linux

["dave at hiauly1 dot hia dot nrc dot ca" <gcc-bugzilla at gcc dot gnu dot org>]

------- Additional Comments From dave at hiauly1 dot hia dot nrc dot ca  2004-01-18 18:07 -------
Subject: Re:  [3.4/3.5 regression] gnat1 segmentation fault in

> I'll look at the RTL for targparm.adb.

Looks as if reload is broken.

We have this RTL after lreg:

(insn 122 740 592 3 ../../gcc/gcc/ada/targparm.adb:89 (parallel [
            (set (mem/s/u:BLK (reg/f:SI 171) [6 targparm__d32_str+8 S16 A32])
		(mem/s/u:BLK (reg/f:SI 169) [1 S16 A32]))
	    (clobber (reg:SI 173))
	    (clobber (reg:SI 174))
	    (clobber (reg:SI 175))
	    (clobber (reg:SI 176))
	    (clobber (reg:SI 177))
	    (use (const_int 16 [0x10]))
	    (use (const_int 4 [0x4]))
	]) 62 {movstrsi_prereload} (insn_list 120 (insn_list 119 (insn_list:REG_DEP_ANTI 117 (nil))))
    (expr_list:REG_DEAD (reg/f:SI 169)
	(expr_list:REG_DEAD (reg/f:SI 171)
	    (expr_list:REG_UNUSED (reg:SI 177)
		(expr_list:REG_UNUSED (reg:SI 176)
		    (expr_list:REG_UNUSED (reg:SI 175)
			(expr_list:REG_UNUSED (reg:SI 174)
			    (expr_list:REG_UNUSED (reg:SI 173)
				(nil)))))))))

This is the reload info and rtl after greg for insn 122:

Reloads for insn # 122
Reload 0: reload_in (SI) = (const:SI (plus:SI (symbol_ref/v:SI ("targparm__d32_str") <var_decl 0x40424d20 targparm__d32_str>)
                                                        (const_int 8 [0x8])))
	GENERAL_REGS, RELOAD_FOR_INPUT (opnum = 0), can't combine
	reload_in_reg: (reg/f:SI 171)
	reload_reg_rtx: (reg:SI 4 %r4)
Reload 1: reload_out (SI) = (reg:SI 173)
	GENERAL_REGS, RELOAD_FOR_OUTPUT (opnum = 2)
	reload_out_reg: (reg:SI 173)
	reload_reg_rtx: (reg:SI 4 %r4)
Reload 2: reload_out (SI) = (reg:SI 174)
	GENERAL_REGS, RELOAD_FOR_INSN (opnum = 3)
	reload_out_reg: (reg:SI 174)
	reload_reg_rtx: (reg:SI 5 %r5)

(insn 122 764 592 3 ../../gcc/gcc/ada/targparm.adb:89 (parallel [
            (set (mem/s/u:BLK (reg:SI 4 %r4) [6 targparm__d32_str+8 S16 A32])
		(mem/s/u:BLK (reg/f:SI 19 %r19 [169]) [1 S16 A32]))
	    (clobber (reg:SI 4 %r4))
	    (clobber (reg:SI 5 %r5))
	    (clobber (reg:SI 31 %r31 [175]))
	    (clobber (reg:SI 29 %r29 [176]))
	    (clobber (reg:SI 28 %r28 [177]))
	    (use (const_int 16 [0x10]))
	    (use (const_int 4 [0x4]))
	]) 62 {movstrsi_prereload} (insn_list 120 (insn_list 119 (insn_list:REG_DEP_ANTI 117 (nil))))
    (nil))

SI 173 isn't used for anything else in the entire code.  There is a "2"
constraint for the "const_int 16" operand, so the constant should get
reloaded into operand 2.  However, I can't see why operand 0 and 2 should
end up being allocated to the same register.

Dave


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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=13713