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[Bug target/12028] [3.4 Regression] powerpc-eabispe: ICE building __divdi3.o: in ccr_bit, at config/rs6000/rs6000.c:8136
- From: "geoffk at geoffk dot org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: 10 Nov 2003 01:01:24 -0000
- Subject: [Bug target/12028] [3.4 Regression] powerpc-eabispe: ICE building __divdi3.o: in ccr_bit, at config/rs6000/rs6000.c:8136
- References: <20030821233244.12028.dhazeghi@yahoo.com>
- Reply-to: gcc-bugzilla at gcc dot gnu dot org
------- Additional Comments From geoffk at geoffk dot org 2003-11-10 01:01 -------
Subject: Re: [3.4 Regression] powerpc-eabispe: ICE building __divdi3.o: in ccr_bit, at config/rs6000/rs6000.c:8136
"pinskia at gcc dot gnu dot org" <gcc-bugzilla@gcc.gnu.org> writes:
> ------- Additional Comments From pinskia at gcc dot gnu dot org 2003-11-09 21:41 -------
> The problem is part of the patch:
> /* When generating a sCOND operation, only positive conditions are
> allowed. */
> if (scc_p && code != EQ && code != GT && code != LT && code != UNORDERED
> && code != GTU && code != LTU)
> abort ();
> Down below that, there is case for NE (which is the code at this point).
The check is clearly correct. In the SPE case, both 'EQ' and 'NE' are
'base_bit + 1', but for a sCOND operation the bit must be set when the
condition is true, and EQ and NE are mutually exclusive. So the
problem must be somewhere else, and removing the check would only
guarantee bad code generation.
--
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=12028