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[Bug optimization/11820] New: Unoptimized complementary conditional instructions


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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=11820

           Summary: Unoptimized complementary conditional instructions
           Product: gcc
           Version: 3.4
            Status: UNCONFIRMED
          Severity: minor
          Priority: P3
         Component: optimization
        AssignedTo: unassigned at gcc dot gnu dot org
        ReportedBy: alga at rgai dot hu
                CC: gcc-bugs at gcc dot gnu dot org
 GCC build triplet: i686-pc-linux-gnu
  GCC host triplet: i686-pc-linux-gnu
GCC target triplet: arm-unknown-elf

After CE3 and SCHED2 phases GCC does not optimize conditionally executed
expressions.
Sometimes the generated code contains two conditionally executed expressions
that compute the same values in each complementary condition case (eg. in arm:
"movle r3, #12" and "movgt r3, #12"). These instructions could be combined into
one unconditional computation.
The problem generally occurs when the source code contains the same instruction
in both branches of an if-statement.

--- c example ---
// arm-elf-gcc -S -g0 -Os -o comp-cond.s comp-cond.c
int a,c;
void foo(int b)
{
  if (c > 13)
  {
    a = 12;
  }
  else
  {
    a = 12;
    c = b + 3;
  }
}

--- arm code ---
foo:
 ldr r1, .L4
 ldr r3, [r1, #0]
 ldr r2, .L4+4
 cmp r3, #13
 add r0, r0, #3
 movgt r3, #12 <- OLD
 movle r3, #12 <- OLD
 strgt r3, [r2, #0] <- OLD
 strle r3, [r2, #0] <- OLD
 strle r0, [r1, #0]
 mov pc, lr 

--- possible solution ---
foo:
 ldr r1, .L4
 ldr r3, [r1, #0]
 ldr r2, .L4+4
 cmp r3, #13
 add r0, r0, #3
 mov r3, #12 <- NEW
 str r3, [r2, #0] <- NEW
 strle r0, [r1, #0]
 mov pc, lr


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