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[Bug optimization/10945] Trivial Bit Twiddling Optimizations Not Performed


           What    |Removed                     |Added
             Status|UNCONFIRMED                 |NEW
     Ever Confirmed|                            |1
   Last reconfirmed|0000-00-00 00:00:00         |2003-06-01 02:26:14
               date|                            |

------- Additional Comments From  2003-06-01 02:26 -------
Confirmed with 3.3 and mainline. For the first two tests, gcc has in the
second test the following code
	movl	12(%esp), %ecx
	andl	%ecx, %edx
where in the first test it uses
	andl	4(%esp), %eax
IIRC from my long long gone assembler times, then the second is only
possible with eax, where in the first case an intermediate register
is needed. If this is really the case then it's a problem of the
register allocator, since it could rotate the registers appropriately.

For the second pair of testcases, I'm even less qualified to comment.
Apart from the fact that the code is indeed different.


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