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Re: machine description porting question.
- From: Hans-Peter Nilsson <hp at bitrange dot com>
- To: Spundun Bhatt <spundun at ISI dot EDU>
- Cc: gcc-bugs at gcc dot gnu dot org
- Date: Sat, 19 Oct 2002 03:42:47 -0400 (EDT)
- Subject: Re: machine description porting question.
On Fri, 18 Oct 2002, Spundun Bhatt wrote:
> Hi,
> I am porting gcc to a new platform and it seems this mailing list is the
> closest match. My apologies if this is not the correct place.
gcc@ is better.
> The machine that I am porting to has an instruction set similar to IBM
> rs6000, so we have taken rs6000 config files as the tmplate and are
> trying to make modifications to it.
> My question is mainly regarding adding a temporary register in any insn
> definition in the machine description file.
It's not really "mainly", but a special case. (Getting a
temporary register is done by other solutions in other
contexts.)
> the scenario:
> my machine doesnt have a compare instruction so I want to use subc
> instruction (subtract and modify cc).
> The compare instruction on powerpc looks similar to cmp RA,RB while
> subtract instruction on my architecture looks like SUBC rD,rA,rB.
> So gcc has to allocate a temporary register for rD, and I dont know how
> to go about that.
You make the compare instruction pattern a define_expand which
expands to the subtract insn. Or, since you say your machine is
rs6000-like, you use the same expand-compare-insn-in-the-cc-user
method used there, and expand to a *subtraction* (e.g.
gen_subsi3) in your equivalent to rs6000_generate_compare. You
get the temporary result register from gen_reg_rtx (mode).
brgds, H-P