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optimization/3977: arm peephole for loading two consecutive memory locations generates suboptimal code (on arm7tdmi)
- To: gcc-gnats at gcc dot gnu dot org
- Subject: optimization/3977: arm peephole for loading two consecutive memory locations generates suboptimal code (on arm7tdmi)
- From: segher at chello dot nl
- Date: 9 Aug 2001 19:37:26 -0000
- Reply-To: segher at chello dot nl
>Number: 3977
>Category: optimization
>Synopsis: arm peephole for loading two consecutive memory locations generates suboptimal code (on arm7tdmi)
>Confidential: no
>Severity: non-critical
>Priority: medium
>Responsible: unassigned
>State: open
>Class: pessimizes-code
>Submitter-Id: net
>Arrival-Date: Thu Aug 09 12:46:01 PDT 2001
>Closed-Date:
>Last-Modified:
>Originator: segher@chello.nl
>Release: 3.0
>Organization:
>Environment:
>Description:
I often see generated code like
add temp, pointer, #offset
ldmia temp, {regA, regB}
(after which temp is dead)
which is slower than just
ldr regA, [pointer, #offset]
ldr regB, [pointer, #offset+4]
and wastes a register as well
>How-To-Repeat:
a lot of code will do this
>Fix:
change the peephole, i think
>Release-Note:
>Audit-Trail:
>Unformatted: