[PATCH] Re: gcc.dg/20001013-1.c

[Jakub Jelinek <jakub at redhat dot com>]

Ouch, I missed the patch:

2001-05-14  Jakub Jelinek  <jakub@redhat.com>

	* config/sparc/sparc.h (ASM_CPU_SPEC): Pass -Av9a to assembler for
	-mvis.
	(CPP_CPU_SPEC): Add deprecation messages to deprecated switches.
	* config/sparc/sol2.h (ASM_CPU_SPEC): Pass -xarch=v8plusa to
	assembler for -mvis.
	* config/sparc/sol2-sld-64.h (ASM_CPU_SPEC): Pass -xarch=v8plusa or
	-xarch=v9a to assembler for -mvis.
	(CPP_CPU_SPEC): Add deprecation messages to deprecated switches.
	* invoke.texi (SPARC Options): Remove retired and deprecated
	options, add -mvis and -mv8plus.
	
--- gcc/config/sparc/sparc.h.jj	Mon May 14 11:44:07 2001
+++ gcc/config/sparc/sparc.h	Mon May 14 12:40:14 2001
@@ -223,11 +223,12 @@ Unrecognized value in TARGET_CPU_DEFAULT
 /* Common CPP definitions used by CPP_SPEC amongst the various targets
    for handling -mcpu=xxx switches.  */
 #define CPP_CPU_SPEC "\
-%{mcypress:} \
-%{msparclite:-D__sparclite__} \
-%{mf930:-D__sparclite__} %{mf934:-D__sparclite__} \
-%{mv8:-D__sparc_v8__} \
-%{msupersparc:-D__supersparc__ -D__sparc_v8__} \
+%{mcypress:%n`-mcypress' is deprecated. Use `-mcpu=' or `-mtune=' instead.\n} \
+%{msparclite:-D__sparclite__ %n`-mcypress' is deprecated. Use `-mcpu=' or `-mtune=' instead.\n} \
+%{mf930:-D__sparclite__ %n`-mf930' is deprecated. Use `-mcpu=' or `-mtune=' instead.\n} \
+%{mf934:-D__sparclite__ %n`-mf934' is deprecated. Use `-mcpu=' or `-mtune=' instead.\n} \
+%{mv8:-D__sparc_v8__ %n`-mv8' is deprecated. Use `-mcpu=' or `-mtune=' instead.\n} \
+%{msupersparc:-D__supersparc__ -D__sparc_v8__ %n`-msupersparc' is deprecated. Use `-mcpu=' or `-mtune=' instead.\n} \
 %{mcpu=sparclet:-D__sparclet__} %{mcpu=tsc701:-D__sparclet__} \
 %{mcpu=sparclite:-D__sparclite__} \
 %{mcpu=f930:-D__sparclite__} %{mcpu=f934:-D__sparclite__} \
@@ -300,10 +301,10 @@ Unrecognized value in TARGET_CPU_DEFAULT
 %{mcpu=sparclite:-Asparclite} \
 %{mcpu=sparclite86x:-Asparclite} \
 %{mcpu=f930:-Asparclite} %{mcpu=f934:-Asparclite} \
-%{mv8plus:-Av8plus} \
-%{mcpu=v9:-Av9} \
-%{mcpu=ultrasparc:%{!mv8plus:-Av9a}} \
-%{!mcpu*:%{!mcypress:%{!msparclite:%{!mf930:%{!mf934:%{!mv8:%{!msupersparc:%(asm_cpu_default)}}}}}}} \
+%{mcpu=ultrasparc|mvis:%{!mv8plus:-Av9a}}} \
+%{!mvis: %{mv8plus:-Av8plus} \
+         %{mcpu=v9:-Av9}} \
+%{!mcpu*:%{!mvis:%{!mcypress:%{!msparclite:%{!mf930:%{!mf934:%{!mv8:%{!msupersparc:%(asm_cpu_default)}}}}}}}} \
 "
 
 /* Word size selection, among other things.
--- gcc/config/sparc/sol2.h.jj	Fri Nov  3 10:53:39 2000
+++ gcc/config/sparc/sol2.h	Mon May 14 11:55:08 2001
@@ -56,9 +56,8 @@ Boston, MA 02111-1307, USA.  */
 #endif
 #undef ASM_CPU_SPEC
 #define ASM_CPU_SPEC "\
-%{mcpu=v8plus:-xarch=v8plus} \
-%{mcpu=ultrasparc:-xarch=v8plusa} \
-%{!mcpu*:%(asm_cpu_default)} \
+%{mvis|mcpu=ultrasparc:-xarch=v8plusa} \
+%{!mvis:%{mcpu=v8plus:-xarch=v8plus} %{!mcpu*:%(asm_cpu_default)}} \
 "
 
 /* However it appears that Solaris 2.0 uses the same reg numbering as
--- gcc/config/sparc/sol2-sld-64.h.jj	Wed Apr 11 16:07:42 2001
+++ gcc/config/sparc/sol2-sld-64.h	Mon May 14 12:42:15 2001
@@ -73,11 +73,12 @@
 
 #undef CPP_CPU_SPEC
 #define CPP_CPU_SPEC "\
-%{mcypress:} \
-%{msparclite:-D__sparclite__} \
-%{mf930:-D__sparclite__} %{mf934:-D__sparclite__} \
-%{mv8:" DEF_ARCH32_SPEC("-D__sparcv8") "} \
-%{msupersparc:-D__supersparc__ " DEF_ARCH32_SPEC("-D__sparcv8") "} \
+%{mcypress:%n`-mcypress' is deprecated. Use `-mcpu=' or `-mtune=' instead.\n} \
+%{msparclite:-D__sparclite__ %n`-msparclite' is deprecated. Use `-mcpu=' or `-mtune=' instead.\n} \
+%{mf930:-D__sparclite__ %n`-mf930' is deprecated. Use `-mcpu=' or `-mtune=' instead.\n} \
+%{mf934:-D__sparclite__ %n`-mf934' is deprecated. Use `-mcpu=' or `-mtune=' instead.\n} \
+%{mv8:" DEF_ARCH32_SPEC("-D__sparcv8") " %n`-mv8' is deprecated. Use `-mcpu=' or `-mtune=' instead.\n} \
+%{msupersparc:-D__supersparc__ " DEF_ARCH32_SPEC("-D__sparcv8") " %n`-msupersparc' is deprecated. Use `-mcpu=' or `-mtune=' instead.\n} \
 %{mcpu=sparclet:-D__sparclet__} %{mcpu=tsc701:-D__sparclet__} \
 %{mcpu=sparclite:-D__sparclite__} \
 %{mcpu=f930:-D__sparclite__} %{mcpu=f934:-D__sparclite__} \
@@ -90,10 +91,10 @@
 
 #undef ASM_CPU_SPEC
 #define ASM_CPU_SPEC "\
-%{mcpu=ultrasparc:" DEF_ARCH32_SPEC("-xarch=v8plusa") DEF_ARCH64_SPEC(AS_SPARC64_FLAG "a") "} \
-%{mcpu=v9:" DEF_ARCH32_SPEC("-xarch=v8plus") DEF_ARCH64_SPEC(AS_SPARC64_FLAG) "} \
-%{!mcpu=ultrasparc:%{!mcpu=v9:%{mcpu*:" DEF_ARCH32_SPEC("-xarch=v8") DEF_ARCH64_SPEC(AS_SPARC64_FLAG) "}}} \
-%{!mcpu*:%(asm_cpu_default)} \
+%{mcpu=ultrasparc|mvis:" DEF_ARCH32_SPEC("-xarch=v8plusa") DEF_ARCH64_SPEC(AS_SPARC64_FLAG "a") "} \
+%{!mvis:%{mcpu=v9:" DEF_ARCH32_SPEC("-xarch=v8plus") DEF_ARCH64_SPEC(AS_SPARC64_FLAG) "}} \
+%{!mcpu=ultrasparc:%{!mcpu=v9:%{!mvis:%{mcpu*:" DEF_ARCH32_SPEC("-xarch=v8") DEF_ARCH64_SPEC(AS_SPARC64_FLAG) "}}}} \
+%{!mcpu*:%{!mvis:%(asm_cpu_default)}} \
 "
 
 #define STARTFILE_SPEC32 "\
--- gcc/invoke.texi.jj	Mon May 14 11:56:57 2001
+++ gcc/invoke.texi	Mon May 14 12:24:49 2001
@@ -330,15 +330,14 @@ in the following sections.
 -mcpu=@var{cpu type} @gol
 -mtune=@var{cpu type} @gol
 -mcmodel=@var{code model} @gol
--m32  -m64 @gol
--mapp-regs  -mbroken-saverestore  -mcypress @gol
--mepilogue -mfaster-structs -mflat @gol
+-m32  -m64  -mapp-regs @gol
+-mepilogue  -mfaster-structs  -mflat @gol
 -mfpu  -mhard-float  -mhard-quad-float @gol
--mimpure-text  -mlive-g0  -mno-app-regs @gol
--mno-epilogue -mno-faster-structs -mno-flat  -mno-fpu @gol
--mno-impure-text -mno-stack-bias  -mno-unaligned-doubles @gol
--msoft-float  -msoft-quad-float  -msparclite  -mstack-bias @gol
--msupersparc  -munaligned-doubles  -mv8}
+-mimpure-text  -mno-app-regs  -mno-epilogue @gol
+-mno-faster-structs  -mno-flat  -mno-fpu  -mno-impure-text @gol
+-mno-stack-bias  -mno-unaligned-doubles  -mno-vis @gol
+-msoft-float  -msoft-quad-float  -mstack-bias @gol
+-munaligned-doubles  -mv8plus  -mvis}
 
 @emph{Convex Options}
 @gccoptlist{
@@ -4967,38 +4966,21 @@ ABI.  Thus, it's intended only for use o
 acknowledges that their resulting code will not be directly in line with
 the rules of the ABI.
 
-@item -mv8
-@itemx -msparclite
-These two options select variations on the SPARC architecture.
-
-By default (unless specifically configured for the Fujitsu SPARClite),
-GCC generates code for the v7 variant of the SPARC architecture.
-
-@samp{-mv8} will give you SPARC v8 code.  The only difference from v7
-code is that the compiler emits the integer multiply and integer
-divide instructions which exist in SPARC v8 but not in SPARC v7.
-
-@samp{-msparclite} will give you SPARClite code.  This adds the integer
-multiply, integer divide step and scan (@code{ffs}) instructions which
-exist in SPARClite but not in SPARC v7.
-
-These options are deprecated and will be deleted in a future GCC release.
-They have been replaced with @samp{-mcpu=xxx}.
-
-@item -mcypress
-@itemx -msupersparc
-These two options select the processor for which the code is optimised.
-
-With @samp{-mcypress} (the default), the compiler optimizes code for the
-Cypress CY7C602 chip, as used in the SparcStation/SparcServer 3xx series.
-This is also appropriate for the older SparcStation 1, 2, IPX etc.
-
-With @samp{-msupersparc} the compiler optimizes code for the SuperSparc cpu, as
-used in the SparcStation 10, 1000 and 2000 series. This flag also enables use
-of the full SPARC v8 instruction set.
+@item -mvis
+@itemx -mno-vis
 
-These options are deprecated and will be deleted in a future GCC release.
-They have been replaced with @samp{-mcpu=xxx}.
+With @samp{-mvis}, GCC can utilize Visual Instruction Set of UltraSPARC and
+later processors, be it clearing of floating point registers or doing
+integer arithmetics in floating point registers where appropriate. This
+option implies @samp{-mcpu=ultrasparc} and is overridden by @samp{-mno-fpu}.
+In programs which don't use the floating point unit otherwise the programmer
+should weight the costs of initializing floating point unit by OS against
+gains from doing some integer arithmetics in the floating point unit.
+
+@item -mv8plus
+
+Do 64-bit shifts, multiplications and divides in 64-bit registers preserved
+in 32-bit environment (@code{%g1} - @code{%g7}, @code{%o0} - @code{%o5}).
 
 @item -mcpu=@var{cpu_type}
 Set the instruction set, register set, and instruction scheduling parameters
@@ -5041,21 +5023,6 @@ on the SPARCLET processor.
 @table @gcctabopt
 @item -mlittle-endian
 Generate code for a processor running in little-endian mode.
-
-@item -mlive-g0
-Treat register @code{%g0} as a normal register.
-GCC will continue to clobber it as necessary but will not assume
-it always reads as 0.
-
-@item -mbroken-saverestore
-Generate code that does not use non-trivial forms of the @code{save} and
-@code{restore} instructions.  Early versions of the SPARCLET processor do
-not correctly handle @code{save} and @code{restore} instructions used with
-arguments.  They correctly handle them used without arguments.  A @code{save}
-instruction used without arguments increments the current window pointer
-but does not allocate a new stack frame.  It is assumed that the window
-overflow trap handler will properly handle this case as will interrupt
-handlers.
 @end table
 
 These @samp{-m} switches are supported in addition to the above

	Jakub